MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 227

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

11.2 External signal description
11.3 Detailed signal descriptions
11.4 Memory map and register definition
Any read or write access to the PORT memory space that is outside the valid memory
map results in a bus error. All register accesses complete with zero wait states.
Freescale Semiconductor, Inc.
PORTx[31:0]
4004_9000
4004_9004
4004_9008
Absolute
address
(hex)
PORTx[31:0]
Name
Signal
Pin Control Register n (PORTA_PCR0)
Pin Control Register n (PORTA_PCR1)
Pin Control Register n (PORTA_PCR2)
Not all pins within each port are implemented on each device.
Table 11-2. PORTx interface-detailed signal descriptions
External interrupt
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
I/O
Function
Register name
Table 11-1. Signal properties
Table continues on the next page...
I/O
PORT memory map
NOTE
I/O
I/O
External interrupt.
State meaning
Timing
Chapter 11 Port control and interrupts (PORT)
(in bits)
Width
32
32
32
Reset
0
Access
Description
R/W
R/W
R/W
Asserted-pin is logic one.
Negated-pin is logic zero.
Assertion-may occur at any
time and can assert
asynchronously to the system
clock.
Negation-may occur at any
time and can assert
asynchronously to the system
clock.
Reset value
0000_0000h
0000_0000h
0000_0000h
Pull
-
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