MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 789
MK30DN512ZVLK10
Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet
1.MK30DN512ZVLK10.pdf
(1547 pages)
Specifications of MK30DN512ZVLK10
Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT
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fixed frequency clock
(FTM counter disable)
system clock
external clock
phase A
phase B
CAPTEST
no clock selected
channel 6
channel 0
ELS7B:ELS7A
ELS1B:ELS1A
channel 7
channel 1
ELS6B:ELS6A
ELS0B:ELS0A
MS7B:MS7A
MS1B:MS1A
MS6B:MS6A
MS0B:MS0A
COMBINE3
COMBINE0
COMBINE3
COMBINE0
DECAPEN
input
DECAPEN
input
DECAPEN
DECAPEN
input
input
CPWMS
CPWMS
CPWMS
fault input n*
CPWMS
Quadrature
decoder
input capture
input capture
input capture
input capture
FAULTM[1:0]
dual edge capture
dual edge capture
mode logic
mode logic
FAULTnEN*
FFLTRnEN*
mode logic
mode logic
FFVAL[3:0]
FAULTIE
mode logic
mode logic
synchronizer
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
QUADEN
FTMEN
CLKS
QUADEN
CPWMS
Figure 36-1. FTM Block Diagram
FTM counter
pair channels 0 - channels 0 and 1
pair channels 3 - channels 6 and 7
*where n = 3, 2, 1, 0
fault control
C6V
C0V
C7V
C1V
initialization, complementary mode, inverting, software output
initialization, complementary mode, inverting, software output
compare, EPWM, CPWM and combine modes according to
compare, EPWM, CPWM and combine modes according to
(generation of channels 6 and 7 outputs signals in output
(generation of channels 0 and 1 outputs signals in output
CH7IE
CH1IE
control, deadtime insertion, output mask, fault control
control, deadtime insertion, output mask, fault control
CH6IE
CH6F
CH7F
CH0IE
CH0F
CH1F
FAULTFn*
CNTIN
FAULTIN
MOD
FAULTF
output modes logic
output modes logic
fault interrupt
and polarity control)
and polarity control)
channel 6
channel 7
channel 1
channel 0
interrupt
interrupt
interrupt
TOFDIR
QUADIR
interrupt
INITTRIGEN
TOIE
TOF
prescaler
CH6TRIG
CH0TRIG
PS
CH7TRIG
CH1TRIG
3
( 1, 2, 4, 8, 16, 32, 64 or 128)
Chapter 36 FlexTimer (FTM)
initialization
timer overflow
trigger
interrupt
fault condition
output signal
output signal
output signal
match trigger
match trigger
output signal
match trigger
match trigger
channel 7
channel 6
channel 6
channel 0
channel 0
channel 1
channel 7
channel 1
789
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