MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 49

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Section Number
49.5
49.6
50.1
50.2
50.3
50.4
Freescale Semiconductor, Inc.
49.4.6
49.4.7
Initialization section......................................................................................................................................................1513
49.5.1
49.5.2
Application information................................................................................................................................................1520
49.6.1
49.6.2
Introduction...................................................................................................................................................................1527
50.1.1
50.1.2
50.1.3
External signal description............................................................................................................................................1530
50.2.1
50.2.2
50.2.3
50.2.4
Register description......................................................................................................................................................1531
50.3.1
50.3.2
50.3.3
50.3.4
Functional description...................................................................................................................................................1533
50.4.1
50.4.2
Interrupts......................................................................................................................................................1505
LCD display fault detect circuit...................................................................................................................1506
Initialization sequence..................................................................................................................................1513
Initialization Examples................................................................................................................................1514
LCD seven segment example description....................................................................................................1521
LCD contrast control....................................................................................................................................1524
Block diagram..............................................................................................................................................1527
Features........................................................................................................................................................1528
Modes of operation......................................................................................................................................1528
TCK—Test clock input................................................................................................................................1530
TDI—Test data input...................................................................................................................................1530
TDO—Test data output................................................................................................................................1530
TMS—Test mode select...............................................................................................................................1530
Instruction register.......................................................................................................................................1531
Bypass register.............................................................................................................................................1531
Device identification register.......................................................................................................................1531
Boundary scan register.................................................................................................................................1532
JTAGC reset configuration..........................................................................................................................1533
IEEE 1149.1-2001 (JTAG) Test Access Port..............................................................................................1533
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
JTAG Controller (JTAGC)
Chapter 50
Title
Page
49