MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 42

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Section Number
44.5
44.6
44.7
44.8
45.1
45.2
45.3
45.4
42
44.4.7
44.4.8
Reset..............................................................................................................................................................................1230
System level interrupt sources......................................................................................................................................1230
44.6.1
DMA operation.............................................................................................................................................................1232
Application information................................................................................................................................................1232
44.8.1
44.8.2
44.8.3
44.8.4
44.8.5
44.8.6
44.8.7
44.8.8
44.8.9
44.8.10
Introduction...................................................................................................................................................................1241
Overview.......................................................................................................................................................................1241
45.2.1
45.2.2
45.2.3
45.2.4
SDHC signal descriptions.............................................................................................................................................1245
Memory map and register definition.............................................................................................................................1246
45.4.1
45.4.2
ISO-7816 / smartcard support......................................................................................................................1224
Infrared interface..........................................................................................................................................1229
RXEDGIF description..................................................................................................................................1231
Transmit/receive data buffer operation........................................................................................................1232
ISO-7816 initialization sequence.................................................................................................................1233
Initialization sequence (non ISO-7816).......................................................................................................1235
Overrun (OR) flag implications...................................................................................................................1236
Overrun NACK considerations....................................................................................................................1237
Match address registers................................................................................................................................1238
Modem feature.............................................................................................................................................1238
IrDA minimum pulse width.........................................................................................................................1239
Clearing 7816 wait timer (WT, BWT, CWT) interrupts..............................................................................1239
Legacy and reverse compatibility considerations........................................................................................1240
Supported types of cards..............................................................................................................................1241
SDHC block diagram...................................................................................................................................1242
Features........................................................................................................................................................1243
Modes and operations..................................................................................................................................1244
DMA System Address Register (SDHC_DSADDR)..................................................................................1247
Block Attributes Register (SDHC_BLKATTR)..........................................................................................1248
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Secured digital host controller (SDHC)
Chapter 45
Title
Freescale Semiconductor, Inc.
Page