MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 45

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Section Number
46.3
46.4
Freescale Semiconductor, Inc.
Memory map/register definition...................................................................................................................................1357
46.3.1
46.3.2
46.3.3
46.3.4
46.3.5
46.3.6
46.3.7
46.3.8
46.3.9
46.3.10
46.3.11
46.3.12
46.3.13
46.3.14
46.3.15
46.3.16
46.3.17
46.3.18
46.3.19
46.3.20
46.3.21
Functional description...................................................................................................................................................1391
46.4.1
46.4.2
46.4.3
46.4.4
46.4.5
46.4.6
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Detailed operating mode descriptions..........................................................................................................1391
I2S clocking.................................................................................................................................................1407
External frame and clock operation.............................................................................................................1412
Receive interrupt enable bit description.......................................................................................................1414
Transmit interrupt enable bit description.....................................................................................................1415
Internal frame and clock shutdown..............................................................................................................1416
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S Transmit Data Registers 0 (I2Sx_TX0).................................................................................................1359
S Transmit Data Registers 1 (I2Sx_TX1).................................................................................................1359
S Receive Data Registers 0 (I2Sx_RX0)...................................................................................................1360
S Receive Data Registers 1 (I2Sx_RX1)...................................................................................................1360
S Control Register (I2Sx_CR)...................................................................................................................1361
S Interrupt Status Register (I2Sx_ISR).....................................................................................................1364
S Interrupt Enable Register (I2Sx_IER)....................................................................................................1369
S Transmit Configuration Register (I2Sx_TCR).......................................................................................1373
S Receive Configuration Register (I2Sx_RCR)........................................................................................1375
S Transmit Clock Control Registers (I2Sx_TCCR)..................................................................................1377
S Receive Clock Control Registers (I2Sx_RCCR)...................................................................................1379
S FIFO Control/Status Register (I2Sx_FCSR)..........................................................................................1380
S AC97 Control Register (I2Sx_ACNT)...................................................................................................1386
S AC97 Command Address Register (I2Sx_ACADD).............................................................................1387
S AC97 Command Data Register (I2Sx_ACDAT)...................................................................................1388
S AC97 Tag Register (I2Sx_ATAG)........................................................................................................1388
S Transmit Time Slot Mask Register (I2Sx_TMSK)................................................................................1389
S Receive Time Slot Mask Register (I2Sx_RMSK).................................................................................1389
S AC97 Channel Status Register (I2Sx_ACCST).....................................................................................1390
S AC97 Channel Enable Register (I2Sx_ACCEN)...................................................................................1390
S AC97 Channel Disable Register (I2Sx_ACCDIS).................................................................................1391
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
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