MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 837
MK30DN512ZVLK10
Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet
1.MK30DN512ZVLK10.pdf
(1547 pages)
Specifications of MK30DN512ZVLK10
Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT
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Part Number:
MK30DN512ZVLK10
Manufacturer:
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HWRSTCNT
SYNCMODE
SWRSTCNT
SWWRBUF
Reserved
Reserved
Reserved
SWINVC
SWSOC
CNTINC
SWOM
SWOC
15–13
INVC
Field
16
12
11
10
9
8
7
6
5
4
3
2
FTM counter synchronization is activated by a hardware trigger.
0
1
This read-only field is reserved and always has the value zero.
Software output control synchronization is activated by the software trigger.
0
1
Inverting control synchronization is activated by the software trigger.
0
1
Output mask synchronization is activated by the software trigger.
0
1
MOD, CNTIN, and CV registers synchronization is activated by the software trigger.
0
1
FTM counter synchronization is activated by the software trigger.
0
1
Synchronization Mode
Selects the PWM synchronization mode.
0
1
This read-only field is reserved and always has the value zero.
SWOCTRL register synchronization
0
1
INVCTRL register synchronization
0
1
This read-only field is reserved and always has the value zero.
CNTIN register synchronization
A hardware trigger does not activate the FTM counter synchronization.
A hardware trigger activates the FTM counter synchronization.
The software trigger does not activate the SWOCTRL register synchronization.
The software trigger activates the SWOCTRL register synchronization.
The software trigger does not activate the INVCTRL register synchronization.
The software trigger activates the INVCTRL register synchronization.
The software trigger does not activate the OUTMASK register synchronization.
The software trigger activates the OUTMASK register synchronization.
The software trigger does not activate MOD, CNTIN, and CV registers synchronization.
The software trigger activates MOD, CNTIN, and CV registers synchronization.
The software trigger does not activate the FTM counter synchronization.
The software trigger activates the FTM counter synchronization.
Legacy PWM synchronization is selected.
Enhanced PWM synchronization is selected.
SWOCTRL register is updated with its buffer value at all rising edges of system clock.
SWOCTRL register is updated with its buffer value by the PWM synchronization.
INVCTRL register is updated with its buffer value at all rising edges of system clock.
INVCTRL register is updated with its buffer value by the PWM synchronization.
FTMx_SYNCONF field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table continues on the next page...
Description
Chapter 36 FlexTimer (FTM)
837
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