MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 116

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Timers
3.8.1.3 Back-to-back acknowledgement connections
In this MCU, PDB back-to-back operation acknowledgment connections are
implemented as follows:
So, the back-to-back chain is connected as a ring:
The application code can set the PDBx_CHnC1[BB] bits to configure the PDB pre-
triggers as a single chain or several chains.
3.8.1.4 PDB Interval Trigger Connections to DAC
In this MCU, PDB interval trigger connections to DAC are implemented as follows.
3.8.1.5 DAC External Trigger Input Connections
In this MCU, two DAC external trigger inputs are implemented.
116
• PDB channel 0 pre-trigger 0 acknowledgement input: ADC1SC1B_COCO
• PDB channel 0 pre-trigger 1 acknowledgement input: ADC0SC1A_COCO
• PDB channel 1 pre-trigger 0 acknowledgement input: ADC0SC1B_COCO
• PDB channel 1 pre-trigger 1 acknowledgement input: ADC1SC1A_COCO
• PDB interval trigger 0 connects to DAC0 hardware trigger input.
• DAC external trigger input 0: ADC0SC1A_COCO
• DAC external trigger input 1: ADC1SC1A_COCO
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Figure 3-39. PDB back-to-back chain
pre-trigger 1
Channel 1
pre-trigger 0
pre-trigger 0
Channel 0
Channel 1
pre-trigger 1
Channel 0
Freescale Semiconductor, Inc.