MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1314

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional description
Boot operation will be terminated when all contents of the enabled boot data are sent to
the master. After boot operation is executed, the slave shall be ready for CMD1 operation
and the master needs to start a normal MMC initialization sequence by sending CMD1.
45.5.9.2 Alternative boot operation
This boot function is optional for the device. If bit 0 in the extended CSD byte[228] is set
to '1', the device supports the alternative boot operation.
After power-up, if the host issues CMD0 with the argument of 0xFFFFFFFA after 74
clock cycles, before CMD1is issued or the CMD line goes low, the slave recognizes that
boot mode is being initiated and starts preparing boot data internally.
Within 1 second after CMD0 with the argument of 0xFFFFFFFA is issued, the slave
starts to send the first boot data to the master on the DAT line(s).
If boot acknowledge is enabled, the slave has to send the acknowledge pattern '010' to the
master within 50ms after the CMD0 with the argument of 0xFFFFFFFA is received. If
boot acknowledge is disabled, theslave will not send out acknowledge pattern '010'.
The master can terminate boot mode by issuing CMD0 (Reset).
Boot operation will be terminated when all contents of the enabled boot data are sent to
the master. After boot operation is executed, the slave shall be ready for CMD1 operation
and the master needs to start a normal MMC initialization sequence by sending CMD1.
1314
DAT[0]
CLK
CMD
Figure 45-37. Multimediacard state diagram (normal boot mode)
50ms
max
S
1 sec.max
010
E
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
S
512bytes
+CRC
E
S
Boot termininted
512bytes
+CRC
E
Min 8 clocks + 48 clocks = 56 clocks required from
CMD singal high to next MMC command
CMD1
RESP
Freescale Semiconductor, Inc.
CMD2
RESP
CMD3
RESP