M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 111

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Table 1.38a. DMA transfer cycles
Table 1.38b. Coefficient j,k
Rev.2.00
REJ03B0005-0200
Note 1: Depends on the value set in the CSE register.
k
j
16-bit transfers
Precautions
8-bit transfers
(DMBIT = "1")
(DMBIT = "0")
Transfer unit
Writing to the DMAE bit in DMiCON register
If the following conditions are met:
Follow the steps below:
Note 1: The DMAS bit remains unchanged even if "1" is written. However, if "0" is written to this bit, it is set to "0" (DMA
not requested). In order to prevent the DMAS bit from being modified to "0", "1" should be written to the DMAS bit when
"1" is written to the DMAE bit. In this way the state of the DMAS bit immediately before being written can be maintained.
Similarly, when writing to the DMAE bit with a read-modify-write instruction, "1" should be written to the DMAS bit in order
to maintain a DMA request which is generated during execution.
Note 2: Read the TCRi register to verify whether the DMAi is in an initial state. If the read value is equal to a value which
was written to the TCRi register before DMA transfer start, the DMAi is in an initial state. (If a DMA request occurs after
writing to the DMAE bit, the value written to the TCRi register is "1".) If the read value is a value in the middle of a transfer,
the DMAi is not in an initial state.
Internal ROM/RAM
The DMAE bit is set to "1" again while it is already set to "1" (DMAi is in active state).
A DMA request may occur simultaneously when the DMAE bit is being written.
Step 1: Write "1" to the DMAE bit and DMAS bit in DMiCON register simultaneously (Note 1).
Step 2: Make sure that the DMAi is in an initial state (Note 2) in a program.
If the DMAi is not in an initial state, the above steps should be repeated.
Oct 16, 2006
1
1
Internal memory
(BYTE = "L")
(BYTE = "H")
(BYTE = "L")
(BYTE = "H")
page 109 of 264
Bus width
16-bit
16-bit
8-bit
8-bit
SFR area
2
2
Acces s
address
Even
Even
Even
Even
Odd
Odd
Odd
Odd
no wait
1
2
No. of read
cycles
Single-chip mode
1
1
1
2
_
_
_
_
1 wait
No. of write
cycles
2
2
External memory
1
1
_
_
1
2
_
_
with wait (Note 1)
No. of read
Memory expansion mode
Microprocessor mode
cycles
2 waits
3
3
1
1
1
1
1
2
2
2
No. of write
cycles
3 waits
4
4
1
1
1
1
1
2
2
2
DMA