M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 262

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Rev.2.00
REJ03B0005-0200
(6) Additional actions to take upon receipt of an EP0 interrupt are as follows (Refer to the flowchart in Figure 1.212):
(7) Writing to the USB Function Interrupt Clear Register (USBIC).
Step #1: Is OUT_BUF_RDY (EP0CSR0) set?
[YES] => Go to Step #2.
[NO] => No special S/W action required. Go to Step #1 after the next EP0 interrupt.
Step #2: Is SETUP_END (EP0CSR5) set?
[YES] => Set CLR_OUT_BUF_RDY, CLR_SETUP_END, & SEND_STALL (i.e., EP0CSR6, EP0CSR11, &
EP0CSR12, respectively). [Also set CLR_SETUP, if SETUP flag == '1'.] Go to Step #1 after the next EP0 interrupt.
[NO] => Go to Step #3.
Step #3: Read number of data bytes equal to the EP0 'Receive Byte Count', stored in EP0WC7-0, from EP0 OUT
FIFO. Is this the final DATA packet of a Control Write Transfer?
[YES] => Go to Step #4_0.
[NO] => Go to Step #5_0.
Step #4_0: Is SETUP_END (EP0CSR5) set?
[YES] => Set CLR_OUT_BUF_RDY, CLR_SETUP_END, & SEND_STALL (i.e., EP0CSR6, EP0CSR11, &
EP0CSR12, respectively). [Also set CLR_SETUP, if SETUP flag == '1'.] Go to Step #1 after the next EP0 interrupt.
[NO] => Set CLR_OUT_BUF_RDY & SET_DATA_END (i.e., EP0CSR6 & EP0CSR9, respectively). [Also set
CLR_SETUP, if SETUP flag == '1'.] Go to Step #4_1.
Step #4_1: Is SETUP_END (EP0CSR5) set?
[YES] => Set SEND_STALL (EP0CSR12). Go to Step #6_0.
[NO] => Go to Step #1 after the next EP0 interrupt.
Step #5_0: Is SETUP_END (EP0CSR5) set?
[YES] => Set CLR_OUT_BUF_RDY, CLR_SETUP_END, & SEND_STALL (i.e., EP0CSR6, EP0CSR11, &
EP0CSR12, respectively). [Also set CLR_SETUP, if SETUP flag == '1'.] Go to Step #1 after the next EP0 interrupt.
[NO] => Set CLR_OUT_BUF_RDY (i.e., EP0CSR6). [Also set CLR_SETUP, if SETUP flag == '1'.] Go to Step #5_1.
Step #5_1: Is SETUP_END (EP0CSR5) set?
[YES] => Set SEND_STALL (EP0CSR12). Go to Step #6_0.
[NO] => Go to Step #1 after the next EP0 interrupt.
Step #6_0: Are OUT_BUF_RDY & SETUP (EP0CSR0 & EP0CSR2) set?
[YES] => Go to Step #6_1.
[NO] => Go to Step #6_0 after the next EP0 interrupt.
Step #6_1: Is SETUP_END (EP0CSR5) set?
[YES] => Set CLR_OUT_BUF_RDY, CLR_SETUP, & CLR_SETUP_END (EP0CSR6, EP0CSR8 & EP0CSR11). Go
to Step #6_0 after the next EP0 interrupt.
[NO] => Set CLR_OUT_BUF_RDY & CLR_SETUP (EP0CSR6 & EP0CSR8), and clear SEND_STALL (EP0CSR12).
Go to Step #1 after the next EP0 interrupt.
Writing to the USB Function Interrupt Clear Register (USBIC) to clear USB Function Interrupt Status bits requires
special consideration. Before performing this operation, the USB Function Interrupt Enable Register (USBIE)
should be cleared (i.e., all bits disabled). Upon completion of the write to USBIC, the value of USBIE just prior to
its clearing should be restored.
Oct 16, 2006
page 260 of 264
Usage Notes

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