M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 62

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.35.
Rev.2.00
REJ03B0005-0200
Interrupt resolution circuit
When two or more interrupts are generated simultaneously, this circuit selects the interrupt with the highest priority.
Figure 1.35 shows the circuit that judges the interrupt priority.
Oct 16, 2006
Interrupt resolution circuit
page 60 of 264
UART0/2 Bus collision, Start/stop condition
UART1/3 Bus collision, Start/stop condition
UART1 transmit/NACK/SSI1 transmit
UART0 transmit/NACK/SSI0 transmit
UART1 receive/ACK/SSI1 receive
UART0 receive/ACK/SSI0 receive
UART2 transmit/NACK
UART3 transmit/NACK
UART2 receive/ACK
UART3 receive/ACK
Key-input interrupt
USB Suspend
USB Function
USB Resume
Processor interrupt priority level (IPL)
Vbus Detect
USB Reset
Timer A4
USB SOF
Timer A3
Timer A2
Timer A1
Timer A0
A/D conversion
USB EP0
Priority level of each interrupt
DMA1
DMA0
DMA3
DMA2
INT1
INT0
INT2
Interrupt enable flag (I flag)
Watchdog timer
Address match
Reset
DBC
NMI
Level 0 (initial value)
High
Priority of peripheral I/O interrupts
(if priority levels are same)
Low
accepted
Interrupt
request
Interrupts