M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 80
M30245FCGP#U1
Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet
1.M30245FCGPU1.pdf
(268 pages)
Specifications of M30245FCGP#U1
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M30245 Group
Rev.2.00
REJ03B0005-0200
AUTO_CLR is enabled and continuous transfer mode disabled:
AUTO_CLR is enable and continuous transfer mode enabled:
Single Buffer Mode:
Double Buffer Mode:
Single Buffer Mode:
Double Buffer Mode:
The CPU writes a "1" to the CLR_OUT_BUF_RDY bit after a data set has been unloaded from the buffer by the CPU
(updates the OUT_BUF_STS1 & OUT_BUF_STS0 flags).
• If the buffer has one more data set in it, the buffer status flags transition from 11
• If the buffer has no more data set in it, the buffer status flags transition from 10
The USB FCU updates the corresponding EPx OUT CSR’s OUT_BUF_STS1 & OUT_BUF_STS0 flags from 00
11
The USB FCU updates the OUT_BUF_STS1 & OUT_BUF_STS0 flags from 11
packet has been unloaded from the buffer by the CPU without the CPU writing a "1" to the CLR_OUT_BUF_RDY bit.
The USB FCU updates the corresponding EPx OUT CSR’s OUT_BUF_STS1 & OUT_BUF_STS0 flags after it has
successfully received a data packet from the host.
• If the buffer has only one data packet, the buffer status flags transition from 00
• If the buffer has two data packets, the buffer status flags transition from 10
The USB FCU updates the OUT_BUF_STS1 & OUT_BUF_STS0 flags automatically when a data packet has been
unloaded from the buffer by the CPU without the CPU writing a "1" to the CLR_OUT_BUF_RDY bit.
• If the buffer has one more data packet in it, the buffer status flags transition from 11
The USB FCU updates the corresponding EPx OUT CSR’s OUT_BUF_STS1 & OUT_BUF_STS0 flags from 00
11
The USB FCU updates the OUT_BUF_STS1 & OUT_BUF_STS0 flags from 11
set has been unloaded from the buffer by the CPU without the CPU writing a "1" to the CLR_OUT_BUF_RDY bit.
The USB FCU updates the corresponding EPx OUT CSR’s OUT_BUF_STS1 & OUT_BUF_STS0 flags after it has
successfully received a data set equal to its buffer size or a short packet from the host.
• If the buffer has only one data set, the buffer status flags transition from 00
• If the buffer has two data sets, the buffer status flags transition from 10
The USB FCU updates the OUT_BUF_STS1 & OUT_BUF_STS0 flags automatically when a data set has been unloaded
from the buffer by the CPU without the CPU writing a "1" to the CLR_OUT_BUF_RDY bit.
• If the buffer has one more data set in it, the buffer status flags transition from 11
• If the buffer has no more data set in it, the buffer status flags transition from 10
2
2
after it has successfully received a data packet from the host.
after it has successfully received a data set equal to its buffer size or a short packet from the host.
Oct 16, 2006
page 78 of 264
2
to 11
2
2
to 11
to 10
2
2
2
2
2
2
to 00
to 00
.
to 10
2
2
to 00
to 00
2
2
to 10
to 10
.
.
2
2
2
2
to 10
2
2
automatically when the data
automatically when the data
.
.
2
2
.
.
.
2
Universal Serial Bus
.
2
to
2
to
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