M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 132

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.92. Serial I/O-related registers (4)
Rev.2.00
REJ03B0005-0200
Oct 16, 2006
UARTi special mode register 2 (i= 0 to 3)
UARTi special mode register (i= 0 to 3)
b7
b7
b6
b6
b5
b5
b4
b4
b3
page 130 of 264
b3
b2
b2
b1
b1
b0
b0
Note: These bits are unavailable when SCLi is external clock.
Bit Symbol
Note 1: Only "0" may be written
Note 2: UART0: Timer A3 underflow signal, UART1: Timer A4 underlfow signal, UART2 :Timer A0
Note 3: Set to "0" in normal mode (IICM="0")
IICM
ABC
BBS
LSYN
ABSCS
ACSE
SSS
IICM2
CSC
SWC
ALS
STC
SWC2
SDHI
Nothing is assigned.
Write "0" when writing to this bit. The value is indeterminate if read.
Bit Symbol
Nothing is assigned.
Write "0" when writing to this bit. The value is indeterminate if read.
Symbol
UiSMR2 (i = 0 to 3)
Symbol
UiSMR (i = 0 to 3)
underflow signal, UART3: Timer A3 underflow signal
I
Arbitration lost detecting
flag control bit
Bus busy flag
SCLL sync output
enable bit
Bus collision detect
sampling clock
select bit
Transmit start condition
select bit
Auto-clear function
select bit of transmit
enable bit
2
UARTi initialize bit (Note)
SCL wait output bit 2 (Note)
I
Clock synchronous bit
SCL wait output bit (Note)
SDA output stop bit
SDA output inhibit bit
C mode select bit
2
C mode select bit 2
Bit Name
Bit Name
03A6
03A7
16
16
, 0366
, 0367
0 : Normal mode
1 : I
0 : Update per bit
1 : Update per byte
0 : STOP detected
1 : START detected
0 : Disabled
1 : Enabled (Note 3)
Set to "0"
Set to "0"
Set to "0"
(clock synchronous
serial I/O mode)
Address
2
Address
16
C mode
Function
16
, 0336
, 0337
0 : NACK/ACK interrupt (DMA source-ACK)
Transfer to receive buffer at the rising edge
of last bit of receive clock. Receive interrupt
occurs at the rising edge of last bit of receive
clock.
1 : UART transfer/receive interrupt (DMA
source-UART receive) Transfer to receive
buffer at the falling edge of last bit of receive
clock. Receive interrupt occurs at the falling
edge of last bit of receive clock
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : UARTi clock
1 : output
0 : Disabled
1 : Enabled (high impedance)
16
16
, 0326
, 0327
16
16
Function
Set to "0"
Set to "0"
Set to "0" (Note 1)
Set to "0"
0 : Rising edge of transfer clock
1 : Timer Ai underflow signal
0 : No auto clear function
1 : Auto clear when bus occurs
0 : Ordinary
1 : Falling edge of RxDi
(Note 2)
(UART mode)
Function
When reset
When reset
00
Serial Communication
00
16
16
O
O
O
O
O
O
O
_
R W
O
O
O
O
O
O
O
R W
_
O
O
O
O
O
O
O
O
O
O
O
O
O
O