M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 203

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.153. Block erase flowchart
Rev.2.00
REJ03B0005-0200
5. Block Erase Command (20
By writing the command code "20
cycle to the block address of a flash memory block, the system initiates an auto erase (erase and erase verify)
operation. Figure 1.153 is an example of a block erase flowchart.
Read the status register or the flash memory control register 0 to confirm the completion of the auto erase operation.
At the same time the auto erase operation starts, the read status register mode is automatically entered, so the
contents of the status register can be read out. The status register bit 7 (SR7) is set to "0" at the same time the auto
erase operation starts and is returned to "1" when the auto erase operation is completed. The read status register
mode remains active until the Read Array command (FF
flash memory is reset using its reset bit.
The RY/BY status flag of the flash memory control register 0 is "0" during auto erase operation and "1" when the auto
erase operation and status register bit 7 is completed.
After the auto erase operation is completed, the status register can read for the results of the auto erase operation.
Refer to the status register for more details.
A lock bit protects each block of the flash memory against erasure. Refer to the data protect function section for more
details.
6. Erase All Unlock Blocks Command (A7
By writing the command code "A7
cycle that follows, the system starts erasing blocks successively.
Reading the status register or the flash memory control register 0 confirms whether the erase all unlock blocks
command was terminated in the same way as for block erase. Also, the status register can read out the results of the
auto erase operation.
When the lock bit disable bit of the flash memory control register 0 = "1", all blocks are erased regardless of how the lock
bit is set. On the other hand, when the lock bit disable bit = "0", the function of the lock bit is effective and only unlocked
blocks (where lock bit data = "1") are erased.
Oct 16, 2006
page 201 of 264
16
/D0
16
16
" in the first bus cycle and the confirmation command code "D0
" in the first bus cycle and the confirmation command code "D0
16
)
16
Check full status check
/D0
RY/BY status flag
Block address
16
Write D0
Block erase
Write 20
completed
)
Start
= 1?
YES
16
16
16
) or Read Lock Bit Status command (71
NO
CPU Rewrite Mode
16
16
16
" in the second bus
" in the second bus
) is written or the