M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 48

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Figure 1.22. Power control mode state transition diagram
Rev.2.00
REJ03B0005-0200
State Transitions for Stop and Wait modes
All oscillators stopped
All oscillators stopped
State Transitions for normal mode
All oscillators stopped
Main clock is oscillating
Sub clock is oscillating
CM06 = "0"
(Notes 1, 3)
Oct 16, 2006
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "0"
Stop Mode
Stop Mode
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "0"
Stop Mode
Medium-speed mode
(divided-by-4 mode)
High-speed mode
BCLK : f(X
BCLK ; f(X
CM06 = "1"
CM04 = "0"
Note 1: Switch clock after oscillation of main clock is sufficiently stable.
Note 2: Switch clock after oscillation of sub clock is sufficiently stable.
Note 3: Change CM06 after changing CM17 and CM16.
Note 4: Transit in accordance with arrow.
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "0"
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "0"
in
page 46 of 264
Medium-speed mode
(divided-by-4 mode)
in
)/4
High-speed mode
)
BCLK : f(X
BCLK ; f(X
CM04 = "0"
CM10 = "1"
CM10 = "1"
Interrupt
CM10 = "1"
Interrupt
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "1"
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "1"
CM07 = "0" CM06 = "1"
Main clock is oscillating
Medium-speed mode
(divided-by-2 mode)
Medium-speed mode
(divided-by-16 mode)
Main clock is oscillating
Medium-speed mode
Sub clock is stopped
in
(divided-by-8 mode)
Sub clock is stopped
in
)/4
BCLK : f(X
BCLK: f(X
BCLK ; f(X
)
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "1"
in
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "1"
in
Low-speed / Low power
dissipation mode
in
Medium-speed mode
(divided-by-2 mode)
Medium-speed mode
(divided-by-16 mode)
Medium-speed mode
(divided-by-8 mode)
)/8
)/4
Medium-speed mode
CM04 = "1" (Notes 1, 3)
)/2
BCLK : f(X
BCLK ; f(X
Normal Mode
High speed /
RESET
Medium-speed mode
(divided-by-8 mode)
in
in
BCLK : f(X
)/4
)/2
CM04 = "1"
CM07 = "0"
CM06 = "1"
in
CM07 = "0" (Note 1)
CM06 = "0" (Note 3)
)/8
WAIT
instruction
Interrupt
WAIT
instruction
Interrupt
WAIT
instruction
Interrupt
CM07 = "1" (Note 2)
CM05 = "1"
CM07 = "0" (Note 1)
CM06 = "1"
CM07 = "1"
(Note 2)
CM07 = "0"
(Note 1, 3)
CPU operation stopped
CPU operation stopped
CPU operation stopped
CM05 = "0"
Wait mode
Wait mode
Wait mode
Main clock is stopped
Sub clock is oscillating
Low-power dissipation mode
Main clock is oscillating
Sub clock is oscillating
Low-speed mode
BCLK : f(X
CM07 = "1"
BCLK: f(X
CM07 = "1"
Power Control
cin
cin
)
)
CM05 = "1"

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