M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 44

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Table 1.24. Port status during stop mode
Rev.2.00
REJ03B0005-0200
Address bus, data bus, CS0 to CS3,
BHE
RD, WR
HLDA, BCLK
ALE
Port
Stop Mode
Writing "1" to the all-clock stop control bit (bit 0 at address 0007
stop mode. In stop mode, the content of the internal RAM is retained provided that Vcc remains above 2V.
Because the oscillation of BCLK, f
such as the A/D converter and watchdog timer do not function. However, timer A operates, provided that the event
counter mode is set to an external pulse, and UARTi (i = 0 to 3) functions provided an external clock is selected. Table
1.24 shows the status of the ports in stop mode.
Stop mode is cancelled by a hardware reset or interrupt. If an interrupt is to be used to cancel stop mode, that interrupt
must first be enabled and the interrupt priority of any interrupts not used to cancel stop mode should be set to "0". The
I flag must also be set prior to stopping for an interrupt to cancel it. When returning by an interrupt, that interrupt routine
is executed. If only a hardware reset or an NMI interrupt is used to cancel stop mode, change the priority level of all
interrupts to "0", then change to stop mode.
After coming out of stop mode, it is recommended that four "NOP" instructions be executed to clear the instruction
queue.
When changing from high-speed/medium speed mode to stop mode and at reset, the main clock division select bit 0
(bit 6 at 0006
before stop mode is retained.
, WRL, WRH
Oct 16, 2006
16
Pin
) is set to "1". When changing from low-speed/low power dissipation mode to stop mode, the value
page 42 of 264
1
to f
Retains status before stop mode
"H"
"H"
"H"
Retains status before stop mode
32
, f
_______
1SIO2
Memory expansion mode
Microprocessor mode
to f
32SIO2
, fc, fc
16
32
) stops all oscillation and the microcomputer enters
and f
AD
stops in stop mode, peripheral functions
Retains status before stop mode
Single-chip mode
System Clock

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