M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 51

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Rev.2.00
REJ03B0005-0200
Figure 1.28. Frequency Synthesizer Divide register (FSD)
Figure 1.27. Frequency Synthesizer Multiply register (FSM)
Multiplier
Divider
Clock f
the clock (f
• f
• Setting FSM to 255 disables the multiplier and f
Note 1: n must be chosen such that f
Note 2: Minimum f
Clock f
clock (f
• f
• Setting FSD to 255 disables the divider and f
Oct 16, 2006
NOTE: f
VCO
SYN
MSB
7
= f
= f
VCO
SYN
VCO
PIN
VCO
SYN
PIN
Bit 7
is a divided down version of clock f
is a multiplied up version of clock f
) input to the divider from the multiplier is as follows:
x 2(n+1) where n is the decimal equivalent of the value loaded in FSM.
MSB
/ 2(m+1) where m is the decimal equivalent of the value loaded in FSD.
) input to the multiplier from the prescaler is as follows:
7
= f
page 49 of 264
VCO
PIN
Bit 7
48.00 M z
Note:
f
48.00 M z
48.00 MHz
48.00 MHz
48.00 M z
VCO
Bit 6
is 1 MHz. Maximum f
/ (m+1) when the divide by 3 option (bit 4 at address 03DB
f
SYN
Bit 6
H
f
1 MHz
2 MHz
4 MHz
6 MHz
8 MHz
12 MHz
H
H
PIN
=
Bit 5
f
VCO
FSD
Dec(m)
1
2
2
3
127
Bit 5
/ (m+1)
f
SYN
FSM
Dec(n)
23
11
5
3
2
1
VCO
Bit 4
=
f
VCO
f
if FSCCR4 = 1 and m = 2
Bit 4
VCO
equals 48 MHz.
=
PIN
Hex(m)
01
02
02
03
7F
f
PIN
/2(m+1)
Hex(n)
17
0B
05
03
02
01
x 2(n+1)
PIN
is 12 MHz.
SYN
VCO
Bit 3
Bit 3
VCO
(See Figure 1.27). The relationship between f
= f
(See Figure 1.28). The relationship between f
187.50 KHz
f
12.00 MHz
16.00 MHz
VCO
= f
SYN
8.00 MHz
6.00 MHz
f
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
Bit 2
VCO
Bit 2
PIN
.
.
Bit 1
(Note)
Bit 1
Bit 0
Bit 0
LSB
0
Frequency Synthesizer Circuit
Address: 03DD
Access:
Reset:
LSB
16
0
) is set and when m = 2.
R/W
Address: 03DF
FF
Access: R/W
Reset:
16
16
FF
16
VCO
16
SYN
and
and the