M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 202

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Figure 1.152. Page program flowchart
Rev.2.00
REJ03B0005-0200
1. Read Array Command (FF
The read array mode is entered by writing the command code "FF
address that is to be read is input in one of the bus cycles that follow, the content of the specified address is
read out at the data bus (D
The read array mode is retained until another command is written.
2. Read Status Register Command (70
When the command code "70
the data bus (D
3. Clear Status Register Command (50
This command clears the bits SR3 to SR5 of the status register after being set. These bits indicate that opera-
tion has ended in an error. To use this command, write the command code "50
4. Page Program Command (41
Page program allows for high-speed programming in units of 256 bytes. Page program operation starts when
the command code "41
the write data is sequentially written 16 bits at a time. At this time, the addresses A
by 2 from “00
program and verify operation). Figure 1.152 shows an example of a page program flowchart.
The completed auto write operation can be confirmed by reading the status register or the flash memory
control register 0. At the same time the auto write operation starts, the read status register mode is automati-
cally entered, so the content of the status register can be read out. The status register bit 7 (SR7) is set to 0 at
the same time the auto write operation starts and is returned to 1 when the auto write operation has been
completed. In this case, the read status register mode remains active until the Read Array command (FF
Read Lock Bit Status command (71
The RY/BY status flag of the flash memory control register 0 is "0" during auto write operation and "1" when the
auto write operation and status register bit 7 have been completed.
After the auto write operation is completed, the status register can read out the results of the auto write opera-
tion. Refer to the status register section for more details.
Each block of the flash memory can be write protected by using a lock bit. Refer to the data protect function
section for more details. Additional writes to the pages previously programmed are prohibited.
Oct 16, 2006
16
” to "FE
0
-D
7
) by a read in the second bus cycle.
page 200 of 264
16
16
" is written in the first bus cycle. In the second bus cycle through the 129th bus cycle,
." When the system finishes loading the data, it starts an auto write operation (data
0
-D
16
16
15
)
" is written in the first bus cycle, the content of the status register is read out at
), 16 bits at a time.
16
)
16
) is written or the flash memory is reset using its reset bit.
16
16
)
)
Write address n and
RY/BY status flag
Check full status
Page program
Write 41
completed
n = FE
data n
Start
n = 0
= 1?
YES
YES
16
16
NO
NO
n = n + 2
16
" in the first bus cycle. When an even
16
" in the first bus cycle.
0
-A
7
need to be incremented
CPU Rewrite Mode
16
) or

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