M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 64

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Figure 1.36 shows the interrupt request cause select register.
Rev.2.00
REJ03B0005-0200
INT interrupt
NMI Interrupt
Key-Input Interrupt
______
INT0 to INT2 are triggered by the edges of external inputs. The edge polarity is selected using the polarity select bit in the
interrupt control register (0044
register (035F
For an external interrupt input, an interrupt can be generated both at the rising edge and at the falling edge by setting "1"
in the INTi interrupt polarity switching bit of the interrupt request cause select register (035F
the polarity switching bit of the corresponding interrupt request cause select register to "one edge" ("0"), and set the
polarity select bit in the interrupt control register to rising edge or falling edge.
An NMI interrupt is generated when the input to the P8
maskable external interrupt. The pin level can be checked in the Port P8
cannot be used as a normal port input.
Notes: When not intending to use the NMI function, be sure to connect the NMI pin to Vcc. Because the NMI interrupt is
non-maskable, it cannot be disabled.
When the NMI pin input is "L", do not set the microcomputer in stop mode or wait mode. The NMI interrupt is triggered
by the falling edge, so the "L" level does not need to be maintained longer than necessary.
A Key input interrupt can be generated by a falling edge, rising edge or both edges input to any Port 10 pin. It can also
be used as a Key-on wake up function for canceling the wait mode or stop mode. Figure 1.37 shows the block diagram
of the Key-input interrupt.
Figure 1.38 shows the Key-input mode register. It is possible to select both edges or the falling edge of the Key input
interrupt for P10 with bits 0 and 1 of this register. This register is also used to enable or disable Port 10 pins that are to
be used for Key-input interrupts. Port 10 can be configured with pull-up resistors using the pull-up control resistor.
_______
______
Oct 16, 2006
_______
______
Interrupt request cause select register
b7
16
b6
).
b5
page 62 of 264
b4
b3
b2
b1
16
b0
, 005E
Bit symbol
Nothing is assigned.
Write "0" when writing to these bits. The value is indeterminate when read.
IFSR2
IFSR0
IFSR1
IFSR7
IFSR6
______
16
Symbol
IFSR
, 005F
INT0 interrupt polarity
swiching bit
INT1 interrupt polarity
swiching bit
INT2 interrupt polarity
swiching bit
Bus collision interrupt request
cause select bit 0
Bus collision interrupt request
cause select bit 1
16
) and the polarity switching bit in the interrupt request cause select
Bit name
5
/NMI pin changes from "H" to "L". The NMI interrupt is a non-
Address
______
035F
16
When reset
0 : One edge
1 : Two edges
0 : One edge
1 : Two edges
0 : One edge
1 : Two edges
0 : UART0 Bus collision
1 : UART2 Bus collision
0 : UART1 Bus collision
1 : UART3 Bus collision
5
00
______
register (bit 5 at address 03F0
16
Function
16
). To select one edge, set
______
______
R
W
______
Interrupts
16
). This pin

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