M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 156

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Rev.2.00
REJ03B0005-0200
lE Mode (UiSMR)
Bit 0 to 3 : Not used in IE mode.
Bit 4 is the bus collision detection sampling clock select bit. The bus collision detection interrupt is generated when RxDi
and TxDi level conflict with each other. When this bit is "0", a conflict is detected in sync with the rise of the transfer clock.
When this bit is "1", detection is made when Timer Aj (Timer A3:UART0, Timer A4:UART1, Timer A0:UART2, Timer
A3:UART3 and Timer A4:UART4) underflows. Timer Aj (one-shot mode) should be triggered with corresponding RxDi pin
by connecting RxDi pin to TAjIN pin. The operation is shown in Figure 1.114.
Bit 5 is the transmission enable bit automatic clear select bit. By setting this bit to "1", the transmission bit is automatically
reset to "0" when the bus collision detection interrupt factor bit is "1" (when a conflict is detected).
Bit 6 is the transmit start condition select bit. By setting this bit to "1", TxDi transmission starts in sync with the rise at the
RxDi pin.
Oct 16, 2006
page 154 of 264
IE mode

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