M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 56

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.31. Interrupt control registers control registers
Rev.2.00
REJ03B0005-0200
Interrupt control
The interrupt request bit is set by hardware to "0" when an interrupt request is received. The interrupt request bit can also
be set by software to "0". (Do not set to "1".)
INT0, INT1, and INT2 are triggered by the edges of external inputs. The edge polarity is selected using the polarity select
bit. (Other interrupts are described elsewhere.)
An interrupt must first be enabled before it can be used to cancel stop mode.
Peripheral I/O interrupts have their own interrupt control registers. Figure 1.31 shows the interrupt control registers.
Table 1.29 shows the addresses of the interrupt control registers.
Oct 16, 2006
Interrupt control register
b7
b7
b6
page 54 of 264
b6
b5
0
b5
b4
b4
b3
b3
b2
b2
b1
b1
b0
b0
Note 1: This bit can only be reset (=0), but cannot be set (=1).
Note 2: For S1RIC( 0048
Note: This bit can only be reset (= 0), but cannot be set ( = 1).
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
Bit symbol
Bit symbol
Reserved bit
ILVL1
ILVL2
Symbol
KUPIC
S2RIC
S13BCNIC
TA1IC
EP0IC
TA2IC
S0RIC
ADIC
DMOIC
S3TIC
DM1IC
S2TIC
DM2IC
ILVL0
ILVL1
ILVL2
ILVL0
POL
IR
IR
Symbol
INT1IC
S1RIC
S02BCNIC
INT2IC
INT0IC
Interrupt priority level
select bit
Interrupt request bit
Polarity select bit (Note 2)
Interrupt priority level
select bit
Interrupt request bit
Address
0041
0042
0043
0045
0046
0047
004A
004B
004C
004D
004E
004F
0050
16
16
16
16
16
16
16
16
16
16
16
16
16
Bit name
Bit name
16
) and S02BCNIC ( 0049
When reset
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
Address
0044
0048
0049
005E
005F
2
2
2
2
2
2
2
2
2
2
2
2
2
16
16
16
16
16
0: Interrupt not requested
1: Interrupt requested
0 : Selects falling edge
1 : Selects rising edge
Always set to "0"
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0 : Interrupt not requested
1 : Interrupt requested
16
), "0" should always be written.
Symbol
S1TIC
DM3IC
S0TIC
TA0IC
S3RIC
SUSPIC
TA3IC
RSMIC
TA4IC
RSTIC
SOFIC
VBDIC
USBFIC
Function
Function
When reset
XX00X000
XX00X000
XX00X000
XX00X000
XX00X000
2
2
2
2
2
Address
0051
0052
0053
0054
0055
0056
0057
0058
0059
005A
005B
005C
005D
16
16
16
16
16
16
16
16
16
16
16
16
16
R
When reset
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
R
(Note 1)
(Note)
W
W
2
2
2
2
2
2
2
2
2
2
2
2
2
Interrupts