M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 205

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Table 1.69. Status register bit definition
Rev.2.00
REJ03B0005-0200
SR7 (Bit 7)
SR6 (Bit 6)
SR5 (Bit 5)
SR4 (Bit 4)
SR4 (Bit 3)
SR2 (Bit 2)
SR1 (Bit 1)
SR0 (Bit 0)
Status Register
Write state machine (WSM) status (SR7)
Each SRD bit
Data Protect Function (Block Lock)
Each block in Figure 1.149 has a nonvolatile lock bit to specify that the block is protected (locked) against erase/write.
The lock bit program command is used to set the lock bit to 0 (locked). The lock bit of each block can be read out using
the read lock bit status command.
Whether block lock is enabled or disabled is determined by the status of the lock bit and the lock bit disable bit in flash
memory control register 0.
(1) When the lock bit disable bit = "0", a specified block can be locked or unlocked by the lock bit status (lock bit data).
If lock bit data = "0" (locked), they are disabled against erase/write. On the other hand, if lock bit data = "1" (unlocked) they
are enabled for erase/write.
(2) When the lock bit disable bit = "1", all blocks are unlocked regardless of the lock bit data, and enabled for erase/write.
In this case, the lock bit data is set to "1" (unlocked) after erasure, so that the lock bit is disabled.
The status register indicates the flash memory operating status and whether an erase or program operation has
terminated normally or in error. Table 1.69 details the status register. The contents of this register can be read out only
by writing the read status register command (70
status register. After a reset, the status register is set to "80
After power-on, the write state machine (WSM) status is set to "1".
The write state machine (WSM) status indicates the operating status of the RY/BY pin output. This status bit is set to "0"
during an auto write or auto erase operation and is set to "1" when the operation is completed.
Oct 16, 2006
Reserved
Reserved
Reserved
Reserved
Write state machine (WSM)
Erase status
Program status
Block status after program
page 203 of 264
Status name
16
). Writing the Clear Status Register command (50
16
."
Terminated in error
Terminated in error
Terminated in error
Ready
"1"
_
_
_
_
Definition
Terminated normally
Terminated normally
Terminated normally
CPU Rewrite Mode
Busy
"0"
_
_
_
_
16
) clears the

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