M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 50

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Rev.2.00
REJ03B0005-0200
Figure 1.24. Frequency Synthesizer Control register (FSC)
Figure 1.25. Frequency Synthesizer Clock Control register (FSCCR)
Figure 1.26. Frequency Synthesizer Prescaler register (FSP)
Prescaler
Clock f
the clock f(X
• f
• Setting FSP to 255 disables the prescaler and f
Note: f
Oct 16, 2006
PIN
= f(X
PIN
PIN
frequency below 1 MHz is not recommended.
IN
is a divided down version of clock f(X
Frequency Synthesizer Control register
b7
) / 2(n+1) where n is the decimal equivalent loaded into the FSP.
IN
b6
) input to the prescaler is as follows:
Frequency Synthesizer Clock Control register
0
b7
page 48 of 264
b5
MSB
7
b6
0
b4
0 0
b5
0
b3
Bit 7
b4
b2
b3
0
12 MHz
1 MHz
1 MHz
2 MHz
2 MHz
3 MHz
6 MHz
b1
0 0
b2
Bit 6
f
b0
b1
PIN
b0
Note: Recommended
Bit Symbol
FSE
VCO0
VC01
Reserved bit
CHG0
CHG1
LS
Bit 5
Bit Symbol
FSCCR0
Reserved
FCCR4
Reserved
5
3
255
7
2
1
0
Symbol
FSC
FSP
f
Dec(n )
PIN
Symbol
FSCCR
=
Bit 4
f(X
Frequency Synthesizer enable bit
VCO Gain Control
LPF Current Control
Frequency Synthesizer Lock Status
IN
Clock source selection
Divide-by-3 option
05
03
FF
07
02
01
00
) /2(n+1)
Hex(n)
Bit 3
Bit Name
IN
PIN
Bit Name
) (see Figure 1.26). The relationship between f
12.00 MHz
16.00 MHz
12.00 MHz
16.00 MHz
12.00 MHz
12.00 MHz
12.00 MHz
= f(X
Bit 2
Address
03DC
Address
03DB
f(X
16
IN
16
IN
).
)
Bit 1
Bit 0
b6 b5
0 0 : Disabled
0 1 : Low current
1 0 : Medium current (Note)
1 1 : High current
0 : Disabled
1 : Enabled
b2 b1
0 0 : Lowest gain
0 1 : Low gain
1 0 : High gain (Note )
1 1 : Highest gain
Must always be set to "0"
0 : Unlocked
1 : Locked
0 : Xin
1 : f
Must always be set to "0"
0 : Normal
1 : Divide-by-3
Must always be set to "0"
SYN
When reset
When reset
00
LSB
60
0
Function
Function
16
16
Address: 03DE
Access: R/W
Reset:
Frequency Synthesizer Circuit
FF
16
16
O
O
O
O
R W
O
O
O
O
O
O
O
R W
O
O
O
O
O
O
O
O
O
O
O
PIN
and