M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 223

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Table 1.73. Status register 1 (SRD1)
Rev.2.00
REJ03B0005-0200
SR15 (Bit 7)
SR14 (Bit 6)
SR13 (Bit 5)
SR12 (Bit 4)
SR11 (Bit 3)
SR10 (Bit 2)
SR9 (Bit 1)
SR8 (Bit 0)
Write State Machine (WSM) Status (SR7)
The write state machine (WSM) status indicates the operating status of the flash memory. When power is turned on,
"1" (ready) is set. The bit is set to "0" (busy) during an auto-write or auto-erase operation, but returns to "1" when the
operation ends.
Erase Status (SR5)
The erase status reports the operating status of the auto-erase operation. If an erase error occurs, it is set to "1".
When the erase status is cleared, it is set to "0".
Program Status (SR4)
The program status reports the operating status of the auto-write operation. If a write error occurs, it is set to "1".
When the program status is cleared, it is set to "0".
Block Status After Program (SR3)
If data is overwritten (this occurs when a memory cell becomes overcharged and data is incorrectly read), a "1" is set
for the block status after program at the end of the page write operation.
In other words:
• When writing ends successfully "80
• When writing fails, "90
• When excessive data is written, "88
If "1" is written to any SR5, SR4 or SR3 bits, the page program, block erase, erase all unlocked blocks and lock bit
program commands are not accepted. Before executing these commands, execute the clear status register com-
mand (50
Status Register 1 (SRD1)
Status register 1 indicates the status of serial communications, ID check results, and check sum comparisons. It
can be read after the SRD by writing the read status register command (70
writing the clear status register command (50
Table 1.73 defines each status register 1 bit. "00
maintained even after the reset.
SRD1 bits
Oct 16, 2006
16
).
Boot update complete bit
Reserved
Reserved
Checksum match bit
ID check completed bits
Data receive time out
Reserved
page 221 of 264
16
" is output
Status name
16
16
" is output.
" is output
16
).
16
" is output when power is turned ON and the flag status is
Completed
Time out
Match
"1"
_
_
_
16
). Status register 1 can be cleared by
Definition
0 0 Not verified
0 1 Verified no match
1 0 Reserved
1 1 Verified
Normal operation
Serial I/O Mode 1
Not updated
No match
"0"
_
_
_

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