M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 14

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Functional Block Operation
Rev.2.00
REJ03B0005-0200
The M30245 group contains many functional blocks in a single chip. These blocks include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.
Also included are peripheral blocks such as Timer A, serial I/O, DMAC, CRC calculation circuit, A/D con-
verter, and I/O ports.
Figure 1.5. Memory map
Memory
Figure 1.5 is a memory map of the M30245 group. The address space extends the 1M bytes from address
00000
of internal ROM from E0000
mapped to FFFDC
vector table for timer interrupts, etc., can be set as desired using the internal register (INTB). See the section on
interrupts for details.
From 00400
space from 00400
subroutines and when interrupts are generated.
The SFR area is mapped to 00000
devices such as I/O ports, A/D converter, serial I/O, and timers, etc. Any part of the SFR area that is not occupied
is reserved and cannot be used for other purposes.
The special page vector table is mapped to FFE00
destination addresses of jumps are stored here, subroutine call instructions and jump instructions can be used
as 2-byte instructions, reducing the number of program steps.
In memory expansion mode and microprocessor mode, some memory areas are reserved and cannot be used.
For example, in the M30245MC-XXXGP, the following areas cannot be used.
• The space between 02C00
• The space between D0000
Oct 16, 2006
16
to FFFFF
M30245MC-XXXGP
M30245FCGP
M30245M8-XXXGP
16
Type No.
up is RAM. For example, in the M30245MC-XXXGP, 10K bytes of internal RAM is mapped to the
16
16
16
. From FFFFF
page 12 of 264
to 02BFF
to FFFFF
Address XXXXX
02BFF
02BFF
017FF
16
16
16
16
16
16
16
16
16
Address YYYYY
to FFFFF
and E0000
and 03FFF
. The starting address of the interrupt routine is stored here. The address of the
. In addition to storing data, the RAM also stores the stack used when calling
F0000
E0000
E0000
16
16
16
down is ROM. For example, in the M30245MC-XXXGP, there is 128K bytes
16
16
to 003FF
16
Note 1: Cannot be used during memory expansion and microprocessor modes.
Note 2: Cannot be used in memory expansion mode.
Note 3: Write nothing to internal ROM area in masked ROM.
16
00000
XXXXX
D0000
YYYYY
FFFFF
04000
00400
. The vector table for fixed interrupts such as the reset and NMI are
16
16
(Memory expansion mode)
(Memory expansion and microprocessor modes)
16
16
16
16
16
16
16
16
. This area accommodates the control registers for peripheral
Internal ROM area
Internal RAM area
Table 1.6 to 1.13
16
Internal reserved
External area
Internal reserved
For details, see
area (Note 1)
area (Note 2)
SFR area
(Note 3)
to FFFDB
16
. If the starting addresses of subroutines or the
FFFFF
FFE00
FFFDC
16
16
16
Undefined instruction
BRK instruction
Watchdog timer
Special page
Address match
vector table
Single step
Overflow
Reset
DBC
NMI
Functional Block Operation
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