M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 222

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Figure 1.176. Block diagram of the flash memory version
Table 1.72. Status register (SRD)
Rev.2.00
REJ03B0005-0200
SR7 (Bit 7)
SR6 (Bit 6)
SR5 (Bit 5)
SR4 (Bit 4)
SR4 (Bit 3)
SR2 (Bit 2)
SR1 (Bit 1)
SR0 (Bit 0)
Each SRD bit
Data Protection (Block Lock)
Each block in Figure 1.176 has a nonvolatile lock bit that indicates protection (block lock) against erasing/writing. A
block is locked (writing "0" for the lock bit) with the lock bit program command. Any lock bit can be read with the read lock
bit status command.
Block lock disable/enable is determined by the status of the lock bit and execution status of the lock bit disable and lock
bit enable commands.
(1) After reset and the lock bit enable command is executed, the specified block can be locked/unlocked using the lock
bit (lock bit data). Blocks with a "0" lock bit data are locked and cannot be erased or written to. Blocks with a "1" lock bit
data are unlocked and can be erased or written to.
(2) After the lock bit disable command has been executed, all blocks are unlocked regardless of the lock bit data status
and can be erased or written to. In this case, any lock bit data that was "0" before the block was erased is set to "1"
(unlocked) after erasing.
Status Register (SRD)
The status register indicates the flash memory operating status and whether an erase or program operation has
terminated normally or in error. It can be read by using the read status register command (70
register command (50
register outputs "80
Oct 16, 2006
E0000
F0000
FC000
FFFFF
F8000
FA000
Reserved
Reserved
Reserved
Reserved
16
Write state machine (WSM)
Erase status
Program status
Block status after program
16
16
page 220 of 264
16
16
16
16
".
16
) clears the status register. Table 1.72 defines each status register bit. After reset, the status
Block 4 : 64K bytes
Block 3 : 32K bytes
Block 2 : 8K bytes
Block 1 : 8K bytes
Block 0 : 16K bytes
User ROM area
Status name
Note 1: The boot ROM area can be rewritten only in parallel input/
Note 2: To specify a block, use the maximum address in the block
FE000
FFFFF
output mode. (Access to any other areas is inhibited.)
that is an even address.
16
16
Boot ROM area
Terminated in error
Terminated in error
Terminated in error
8K bytes
Ready
"1"
_
_
_
_
Definition
16
Terminated normally
Terminated normally
Terminated normally
). Writing the clear status
Serial I/O Mode 1
Busy
"0"
_
_
_
_

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