M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 144

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Rev.2.00
REJ03B0005-0200
Transfer data format
Transfer clock
Transmission/reception control
Other settings
Transmission start condition
Receive start condition
Interrupt request generation
timing
Error detection
Table 1.48. Specifications of UART mode compliant with the SIM interface
Note 1: 'm' denotes the value 00
Note 2: fEXT is input from the CLKi pin.
UART mode (compliant with the SIM interface)
The SIM interface is used for connecting the microcomputer with a memory card IC or a similar device. Adding some
extra settings in UART mode allows the user to effect this function. Table 1.48 shows the specifications of UART mode
compliant with SIM interface. Figure 1.102 shows typical transmit/receive timing in UART mode compliant with SIM
interface.
Oct 16, 2006
Item
page 142 of 264
16(m+1)
16(m+1) (Notes 1,2)
033D
036C
16
Transfer data 8-bit UART mode (bits 2 to 0 of address 03A8
One stop bit (bit 4 of addresses 03A8
With the direct format:
With the inverse format:
With the internal clock selected (bit 3 of address 03A8
With an external clock selected (bit 3 of address 03A8
Disable the CTS and RTS function (bit 4 of address 03AC
Set transmission interrupt factor to “transmission completed” (bit 4 of address 03AD
Set N-channel open drain output to TxD pin in UART0, 1, 3 (bit 5 of address 03AC
Transmit enable bit (bit 0 of address 03AD
Transmit buffer empty flag (bit 1 of address 03AD
Receive enable bit (bit 2 of address 03AD
Detection of a start bit
When transmitting
When receiving
Overrun error (See UART specifications)
Framing error (See UART specifications)
Parity error (See UART specifications)
The error sum flag (See UART specifications)
-Set parity to "even" (bits 5 and 6 of addresses 03A8
-Set data logic to "direct" (bit 6 of address 03AD
-Set transfer format to LSB (bit 7 of address 03AC
-Set parity to "odd" (bit 5 and 6 of address 03A8
tively)
-Set data logic to "inverse" (bit 6 of address 03AD
-Set transfer format to MSB (bit 7 of address 03AC
-When data transmission from the UART0 to UART3 transfer register is completed (bit 4 of
address 03AD
-When data transfer from the UART0 to UART3 receive register to the UART0 to UART3
receive buffer register is completed.
-On the reception side, an "L" level is output from the TxDi pin by use of the parity error signal
output functions (bit 7 of address 03AD
detected.
-On the transmission side, a parity error is detected by the level of input to the RxDi pin when a
transmit interrupt occurs
to FF
16
16
, 032D
, 032C
16
that is set to the UARTi bit rate generator
(Note 1): fi=f1, f8, f32
16
16
= "1")
= "1")
16
, 036D
16
, 033D
16
, 032D
16
, 0368
UART mode (compliant with the SIM interface)
Specification
16
16
16
, 036D
16
= "1")
, 036D
, 036D
16
, 0338
16
16
16
16
, 0368
16
, 033D
16
16
, 036D
16
, 036D
16
, 033D
, 036C
, 036D
, 033D
16
, 036C
16
16
16
, 0368
, 0328
, 0368
, 0368
16
16
16
16
16
, 0338
16
, 032D
16
16
, 033D
, 036C
16
16
, 033D
16
, 032D
, 033C
, 033D
, 0368
16
, 032D
16
, 033C
16
16
, 0338
, 0338
16
, 0338
= "0")
16
16
16
, 0328
16
16
16
, 032D
16
16
, 033C
16
, 032D
= "1") when a parity error is
16
, 0338
16
, 032C
, 032D
= "1")
16
16
, 032C
= "1")
, 0328
, 0328
, 0328
16
16
16
16
= "0" and "1" respec-
16
16
16
, 032C
= "0")
16
= "0")
, 0328
16
16
16
= "0")
= "1")
= "1")
= "1")
= "0"): fi/
= "1"): fEXT/
16
16
16
,
16
, 036D
= "1")
= "101
16
2
,
")