M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 84

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.47. USB Power Management register (USBPM)
Rev.2.00
REJ03B0005-0200
Power Management Register
USB Function Interrupt Status Register
The USB Power Management Register, shown in Figure 1.47, is used for power management in the USB FCU.
SUSPEND State Flag:
When the USB FCU does not detect any bus activity on D+/D- (in the J-state) for at least 3ms, it updates the Suspend
State Flag and generates an interrupt. This flag is cleared when active signaling from the host is detected on D+/D- (The
USB FCU generates a resume interrupt), or the CPU sets the Remote Wake-up Bit while in suspend state and it is
subsequently cleared by the CPU. If the USB clock was disabled during the suspend state, the SUSPEND state flag is
not cleared until after the USB clock is re-enabled.
WAKEUP Control Bit:
The CPU writes a "1" to the WAKEUP Control Bit for remote wake-up. While this bit is set and the USB FCU is in suspend
mode, resume signaling is sent to the host. The CPU must keep this bit set for a minimum of 1ms and a maximum of
15ms before writing a "0" to this bit.
USB Function Interrupt Status register, shown in Figure 1.48, is used to indicate the condition that caused a USB
function interrupt to the CPU. A "1" indicates the corresponding condition caused an interrupt.
INTST0, INITST2, INTST4 or INTST6 is set to "1" by the USB FCU when:
• The endpoint is enabled from a disabled state;
• A data set is successfully sent;
• A hardware autoflush takes place or the CPU writes "1" to INxCSR6 (FLUSH) if there are one or two data sets in the
buffer. This causes the EP1-4 IN buffer status flag to change states.
INTST1, INTST3, INTST5 or INTST7 is set to "1" by the USB FCU when:
• A data set is successfully received.
INTST8 is an Error Interrupt Status flag, which indicates that an error has been encountered at any endpoint. This flag
is set to "1" by the USB FCU when:
• EP0CSR4 (FORCE_STALL) flag is set;
• EP0CSR5 (SETUP_END) flag is set;
• INxCSR2 (UNDER_RUN) flag is set on any EP1-4 IN endpoint;
• OUTxCSR2 (OVER_RUN) flag is set on any EP1-4 OUT endpoint;
• OUTxCSR3 (FORCE_STALL) flag is set on any EP1-4OUT endpoint;
USB Power Management register
(b15)
0
b7
Oct 16, 2006
0 0 0 0 0 0 0 0
page 82 of 264
(b8)
b0
b7
0 0 0 0 0
b0
SUSPEND
WAKEUP
Note: Read only
Bit Symbol
Reserved
Symbol
USBPM
Suspend state flag
Remote wakeup
Bit Name
Address
0282
0 : Not in suspend state
1 : In suspend state
0 : End remote wakeup signal
1 : Remote wakeup signaling if SUSPEND="1"
Must always be "0"
16
Function
Universal Serial Bus
When reset
0000
16
R W
O O
O O
Note
O O