M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 201

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Table 1.68.
Rev.2.00
REJ03B0005-0200
Note 1: When a software command is input, the data high-order byte (D
Note 2: SRD= Status register data
Note 3: WA = Write address, WD = Write data.
Note 4: BA = Block address. Enter the maximum address of each block that is an even address.
Note 5: D
Note 6: X denotes a given even address in the user ROM area.
1
2
3
4
5
6
7
8
Microcomputer Mode and Boot Mode
Block Address
Software Commands
The control program for CPU rewrite mode must be written into the user ROM or boot ROM area in parallel I/O mode.
If the control program is written into the boot ROM area, the standard serial I/O mode becomes unusable.
Normal microcomputer mode is entered when the microcomputer is reset when pulling CNV
the CPU starts operating using the control program in the user ROM area.
When the microcomputer is reset by pulling the P5
operating using the control program in the boot ROM area. This mode is called the "boot" mode. The control program
in the boot ROM area can also be used to rewrite the user ROM area.
Block addresses refer to the maximum even address of each block. These addresses are used in the block erase
command, lock bit program command, and read lock status command.
T a b l e 1 . 6 8 l i s t s t h e s o f t w a r e c o m m a n d s a v a i l a b l e w i t h t h e M 3 0 2 4 5 ( f l a s h m e m o r y v e r s i o n ) .
After setting the CPU rewrite mode select bit to 1, write a software command to specify an erase or program operation.
When entering a software command, the upper byte (D
Read array
Read status register
Clear status register
Page program (Note 3)
Block erase
Erase all unlocked blocks
Lock bit program
Read lock bit status
WA and WD must be set sequentially from 00
6
Command
corresponds to the block lock status. When D
Oct 16, 2006
List of software commands
page 199 of 264
Mode
Write
Write
Write
Write
Write
Write
Write
Write
First bus cycle
X
X (Note 6)
X
X
X
X
X
X
Address
16
to FE
6
= "1", the unlocked blocks are "0".
A7
FF
70
50
41
20
77
71
(D
16
16
16
16
16
16
16
16
Data
0
16
to D
(even byte address). The page size is 256 bytes.
7
)
5
pin low, and the CNVSS pin and P5
8
Read
Write
Write
Write
Write
Read
Mode
to D
8
to D
15
) is ignored.
X
X
WA0 (Note 3)
BA (Note 4)
BA
BA
15
Second bus cycle
Address
) is ignored.
SRD (Note 2)
WD0 (Note 3)
D0
D0
D0
D
6
(D
16
16
16
(Note 5)
Data
0
to D
7
)
0
Write
Mode
pin high, the CPU starts
SS
CPU Rewrite Mode
Third bus cycle
pin low. In this case,
WA1
Address
WD1
(D
Data
0
to D
7
)