M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 197

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Figure 1.149. Flash memory version user ROM memory map
Rev.2.00
REJ03B0005-0200
Flash memory
E0000
FC000
F0000
FFFFF
F8000
FA000
The M30245FC contains flash memory that can be rewritten with a single voltage of 3.3 V. Three flash
memory modes are available to read, program, and erase:
• CPU rewrite mode in which the flash memory can be manipulated by the Central Processing Unit (CPU).
• Parallel I/O and standard serial I/O modes can be manipulated using a programmer
The flash memory is divided into several blocks as shown in Figure 1.149.
Memory can be erased one block at a time. Each block has a lock bit to enable or disable execution of an
erase or program operation. This allows data in each block to be protected. Table 1.67 shows an overview of
the M30245 (flash memory version).
In addition to the ordinary user ROM area that stores the microcomputer operation program, the flash memory
has a boot ROM area that stores a program to control rewriting in CPU rewrite and standard serial I/O modes.
The boot ROM area has a standard serial I/O mode control program stored in it when it is shipped from the
factory. However, the user can write a CPU rewrite control program in this area specific to the user's applica-
tion system. The boot ROM area can only be rewritten in parallel I/O mode.
16
16
Oct 16, 2006
16
16
16
16
Block 4 : 64K bytes
Block 3 : 32K bytes
Block 2 : 8K bytes
Block 1 : 8K bytes
Block 0 : 16K bytes
User ROM area
page 195 of 264
Note 1: The boot ROM area can be rewritten only in parallel input/
Note 2: To specify a block, use the maximum address in the block
FE000
FFFFF
output mode. (Access to any other areas is inhibited.)
that is an even address.
16
16
Boot ROM area
8K bytes
Flash Memory

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