M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 172

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.126. A/D converter-related registers (1)
Rev.2.00
REJ03B0005-0200
Oct 16, 2006
AD control register 0 (Note 1)
AD control register 1 (Note 1)
b7
b7
b6
b6
b5 b4
b5 b4
page 170 of 264
b3 b2
b3 b2
b1
b1
b0
b0
Note 1: If the AD control regsiter 0 is rewritten during A/D conversion, the conversion result is
Note 2: When changing A/D operation mode, reset the analog input pin.
Note 3: This bit is disabled in single-sweep mode, repeat-sweep mode 0 and repeat-sweep mode 1.
Note 4: Set to "1" when AD
Note 5: When f(X
Bit Symbol
Bit Symbol
Note 1: If the AD control regsiter 1 is rewritten during A/D conversion, the conversion result is
Note 2: This bit is invalid in one-shot mode and repeat mode. Channels shown in parentheses are
Note 3: When f(X
Nothing is assigned. Write "0" when writing to these bits.
The value is indeterminate when read.
CH0
CH1
CH2
MD0
MD1
TRG
ADST
CKS0
SCAN0
SCAN1
MD2
BITS
CKS1
VCUT
Symbol
ADCON0
Symbol
ADCON1
indeterminate.
indeterminate.
valid when repeat-sweep mode 1 (bit 2 = "1") is selected.
Analog input pin select
bit
A/D operation mode
select bit 0
Trigger select bit
A/D conversion start flag
Frequency select bit
(Note 5)
A/D sweep pin select bit
A/D operation mode select bit 1
8/10-bit mode select bit
Frequency select bit (Note 3)
Vref connect bit
IN
) exceeds 10 MHz, the AD frequency must be set less than 10 MHz by dividing.
IN
) exceeds 10 MHz, the AD frequency must be set less than 10 MHz by dividing.
Bit Name
Bit Name
TRG
is selected.
Address
03D6
Address
03D7
b1 b0
b2 b1 b0
0 0 0 : AN0
0 0 1 : AN1
0 1 0 : AN2
0 1 1 : AN3
1 0 0 : AN4
1 0 1 : AN5
1 1 0 : AN6
1 1 1 : AN7
b4 b3
0 0 : One-shot mode
0 1 : Repeat mode
1 0 : Single sweep mode
1 1 : Repeat sweep mode 0
0 : Software trigger
1 : AD
0 : A/D conversion disabled
1 : A/D conversion enabled
0 : fAD/3 or fAD/4 is selected
1 : fAD/1 or fAD/2 is selected
0 0 : AN0, AN1 (AN0)
0 1 : AN0 to AN3 (AN0, AN1) (Note 2)
1 0 : AN0 to AN5 (AN0 to AN2)
1 1 : AN0 to AN7 (AN0 to AN3)
0 : Any mode other than repeat-sweep mode 1
1 : Repeat-sweep mode 1
0 : 8-bit mode
1 : 10-bit mode
0 : fAD/2 or fAD/4 is selected
1 : fAD/1 or fAD/3 is selected
0 : Vref not connected
1 : Vref connected
16
16
Repeat sweep mode 1
TRG
trigger
Function
Function
(Note 2, 3)
(Note 2)
(Note 4)
When reset
When reset
00
00
16
16
R W
O
O
O
O
O
O
O
O
R W
O
O
O
O
O
O
A/D converter
_
O
O
O
O
O
O
O
O
O
O
O
O
O
O
_