M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 131

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.91. Serial I/O-related registers (3)
Rev.2.00
REJ03B0005-0200
Oct 16, 2006
UARTi transmit/receive control register 0 (i= 0 to 3)
UARTi transmit/receive control register 1 (i= 0 to 3)
b7
b7
b6
b6
b5
b5
page 129 of 264
b4
b4
b3
b3
b2
b2
b1
b1
b0
b0
Note 1: Set the corresponding port direction register to "0".
Note 2: UART2 transfer pin (TxD2:P7
Note 3: Valid only in clock synchronous serial I/O mode and 8-bit UART mode.
Note 4: The corresponding port register and port direction register are invalid.
Symbol
UFORM
Bit Symbol
CKPOL
CLK0
CLK1
CRS
TXEPT
CRD
NCH
(Note 2)
TE
TI
RE
RI
UiIRS
UiRRM
UiLCH
UiERE
Bit
Symbol
UiC0 (i = 0 to 3)
Symbol
UiC1 (i = 0 to 3)
be set to CMOS output.
BRG count source
select bit
CTS/RTS function
select bit
Transmit register
empty flag
CTS/RTS disable bit
Data output select bit
CLK polarity select bit
Transfer format
select bit (Note 3)
Transmit enable bit
Transmit buffer empty
flag
Receive enable bit
Receive complete flag
UARTi transmit interrupt
cause select bit
UARTi continuous
receive mode enable bit
Data logic select bit
Error signal output
enable bit
Bit Name
Bit Name
03AC
03AD
0
0 : TxDi/SDAi and SCLi pin is CMOS output
1 : TxDi/SDAi and SCLi pin is N-channel open drain output
0 0 : f1 is selected
0 1 : f8 is selected
1 0 : f32 is selected
1 1 : Invalid
Valid when bit 4 = "0"
0 : CTS is selected (Note 1)
1 : RTS is selected (Note 4)
0 : Data present in transmit register
1 : No data present in transmit register
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
0 : Transmit data is output at falling edge of
transfer clock and receive data is input at
rising edge
1 : Transmit data is output at rising edge of
transfer clock and receive data is input at
falling edge
0 : LSB first
1 : MSB first
b1 b0
and SCL2:P7
16
16
, 036C
0 : Transmit disabled
1 : Transmit enable
0 : Data present in transmit
1 : No data present in
0 : Receive disabled
1 : Receive enabled
0 : No data packet in receive
1 : Data packet in
0 : Transmit buffer empty
1 : Transmit buffer
0 : Continuous receive
1 : Continuous receive
0 : No reverse
1 : Reverse
Set to "0"
, 036D
(clock synchronous
mode disabled
serial I/O mode)
buffer register
transmit buffer register
buffer register
receive buffer register
(TI =1)
completed ( TXEPT =1)
mode enabled
Address
(clock synchronous
Address
16
Function
serial I/O mode)
16
, 033C
, 033D
1
Function
) is N-channel open drain output. It cannot
16
16
, 032C
, 032D
16
16
0 : Output disabled
1 : Output enabled
Set to "0"
(UART mode)
Function
(UART mode) R W
Set to "0"
When reset
When reset
Function
08
Serial Communication
02
16
16
R W
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
X
X
O
O
O
O
O
O
X
O
O