M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 147

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Table 1.49. I
Rev.2.00
REJ03B0005-0200
Note 1: When using I
Note 2: To switch from one factor to another:
Note 3: Set an initial value of SDA transmission output when I
1
2
3
4
5
6
7
8
9
10
11
I
2
C Bus interface mode
The I
0337
To use the I
output select bit (bit 5 in address 03AC
and RxD (P7
Table 1.49 shows the relationship of the I
serial I/O mode or UART mode, always set this bit to “0”. Figure 1.106 shows a block diagram of I
Cause of interrupt number 3 and 9
(Note 2)
Cause of interrupt number 13 and
15 (Note 2)
Cause of interrupt number 2 and
21 (Note 2)
UARTi transmit output delay
P6
time UARTi is in use
P6
time UARTi is in use
P6
time UARTi is in use
DMA1 factor at the same time
Noise filter width
Reading P6
Initial value of UARTi output
1. Disable the interrupt of the corresponding number.
2. Switch to another factor.
3. Reset the interrupt request flag of the corresponding number.
4. Set the interrupt level of the corresponding number.
I/O is invalid.
RTS function. Select MSB first function.
3
16
2
1
2
, P6
Oct 16, 2006
, P6
, P6
C bus interface mode is provided with UARTi. When the I
, and 0327
2
C features
7
6
5
, P7
, P7
, P7
2
C bus in slave mode, SCLi should be set to input or to output “1”. Also for UART0, 1 and 3, set the data
0
2
0
2
1
and P7
Function
, P6
, P7
, P7
, P7
2
C mode, set 0 1 0 in bits 2, 1, 0 of the UARTi transmit/receive mode register. Disable the CTS/
16
6
4
6
5
, P7
) is set to "1", the I
at the same
at the same
at the same
page 145 of 264
1
) are always N-channel open drain outputs and require external pull-up resistors.
1
, P7
5
2
16
C bus interface circuit is enabled.
Bus collision detection
UARTi transmit
UARTi receive
Not delayed
TxDi (output)
RxDi (input)
CLKi
UARTi receive
15 ns
Reading the terminal when 0 is
assigned to the direction register
"H" level (when 0 is assigned to
CLKi polarity select bit)
, 036C
2
C mode select bit to control. To use the chip in the clock synchronized
Normal mode (IICM=0)
16
, and 032C
2
C mode (I
16
2
) to N-channel open drain output. Note: UART2 TxD
C mode select bit (bit 0 in addresses 03A7
2
C mode select bit = "1") is valid and serial
Start condition detection or stop
condition detection
No acknowledgement detection
(NACK)
Acknowledgment detection (ACK)
Delayed
SDAi (input/output) (Note 3)
SCLi (input/output)
P6
Acknowledgement detection (ACK)
50 ns
Master mode: Reading the terminal
regardless of the value of the direction
register
Slave mode: Reading the terminal
when the corresponding port register
is set to "0"
The value set in latch P6
when the port is selected (Note 3)
1
, P6
I
2
C mode (IICM=1) (Note 1)
5
, P7
2
, P7
I
2
C Bus interface mode
6
2
C mode.
3
, P6
7
, P7
16
, 0367
0
, P7
4
16
,

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