M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 67

IC M16C/24 MCU FLSH 128K 100LQFP

M30245FCGP#U1

Manufacturer Part Number
M30245FCGP#U1
Description
IC M16C/24 MCU FLSH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/20r
Datasheet

Specifications of M30245FCGP#U1

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SPI, SSI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
82
Interface Type
USB/UART/I2C/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M30245 Group
Figure 1.40. Address-match interrupt-related register Interrupt precautions
Precautions
Rev.2.00
REJ03B0005-0200
Address-Match Interrupt
Reading address 00000
Setting the stack pointer
An address-match interrupt is generated when the address-match interrupt address register contents match the
program counter value. Two address-match interrupts can be set, each of which can be enabled and disabled by an
address-match interrupt enable bit. The interrupt enable flag (I flag) does not affect address-match interrupts and
processor interrupt priority level (IPL).
Note: When the external data bus width is set to 8 bits, the address match interrupt cannot be used for external areas.
Figure 1.40 shows the address-match interrupt-related registers.
When maskable interrupt occurs, the CPU reads the interrupt information (the interrupt number and interrupt request
level) in the interrupt sequence. The interrupt request bit of the interrupt written in address 00000
Do not read address 00000
rupt source request bit to "0". Though the interrupt is generated, the interrupt routine may not be executed.
The value of the stack pointer immediately after reset is initialized to 0000
value in the stack pointer may cause program runaway. Be sure to set a value in the stack pointer before accepting an
interrupt.
When using the NMI interrupt, initialize the stack pointer at the beginning of a program. Generating any interrupts
including the NMI interrupt is prohibited for the first instruction immediately after reset.
Oct 16, 2006
_______
(b23)
_______
b7
Address match interrupt register i (i = 0, 1)
Address match interrupt enable register
b7
page 65 of 264
b6
16
b5
(b19)
b3
b4
16
b3
(b16)
b2
by software. Reading address 00000
b0 b7
(b15)
b1
b0
Address setting register for address match interrupt
Nothing is assigned.
Write 0 when writing to these bits. If read, the value is indeterminate.
Nothing is assigned.
Write 0 when writing to these bits. If read, the value is indeterminate.
Bit symbol
AIER0
AIER1
Symbol
AIER
(b8)
b0
b7
Address match interrupt 0
enable bit
Address match interrupt 1
enable bit
Address
0009
Function
Bit name
16
b0
Symbol
RMAD0
RMAD1
16
XXXXXX00
When reset
by software sets enabled highest priority inter-
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0012
0016
16
Address
2
16
16
. Accepting an interrupt before setting a
Values that can be set
to 0010
to 0014
00000
Function
16
16
16
to FFFFF
When reset
X00000
X00000
16
16
R
16
16
R
will then be set to "0".
W
W
Interrupts

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