M30245FCGP#U1 Renesas Electronics America, M30245FCGP#U1 Datasheet - Page 209

• Manufacturer Part Number: M30245FCGP#U1
• Description: IC M16C/24 MCU FLSH 128K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/20r

Specifications of M30245FCGP#U1

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, SSI, UART/USART, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 82
• Interface Type: USB/UART/I2C/SPI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M30245 Group
Figure 1.157. ROM code protect control register
Rev.2.00
REJ03B0005-0200
ROM code protect function
To prevent the contents of the flash memory from being read out or rewritten too easily, the device incorporates a
ROM code protect function for use in parallel I/O mode. The ROM code protect function prevents reading out or
modifying the contents of the flash memory by using the ROM code protect control register (0FFFFF
parallel I/O mode. Figure 1.157 shows the ROM code protect control address. (This address exists in the user
ROM area.)
If one pair of ROM code protect bits is set to "0", ROM code protect is turned on so that the contents of the flash
memory are protected against being read out or modified. The ROM code protect function is implemented in two
levels. If level 2 is selected, the flash memory is protected even against readout by a shipment inspection LSI
tester, etc. If both level 1 and level 2 are selected, level 2 is selected by default.
If both of the two ROM code protect reset bits are set to "00," the ROM code protect function is turned off so that the
contents of the flash memory can be read out or modified. Once ROM code protect is turned on, the contents of the
ROM code protect reset bits cannot be modified in parallel I/O mode. Use the serial I/O mode or another mode to
rewrite the contents of the ROM code protect reset bits.
Oct 16, 2006
ROM code protect control register
b7
b6
b5
b4
page 207 of 264
b3
b2
b1
1 1
b0
Note 1: When ROM code protect is turned on, the on-chip flash memory is
Note 2: When ROM code protect level 2 is turned on, ROM code readout by a
Note 3: The ROM code protect reset bits can be used to turn off ROM code protect
Reserved
ROMCP2
ROMCR
ROMCP1
Bit Symbol
Symbol
ROMCP
protected against readout or modification in parallel input/output mode.
shipment inspection LSI tester, etc, is inhibited.
levels 1 and 2. However, because these bits cannot be changed in parallel
input/output mode, they need to be rewritten in serial input/output or some
other mode.
ROM code protect level 2
set bit (Note 1, 2)
ROM code protect reset bit
(Note 3)
ROM code protect level 1
set bit (Note 1)
Bit Name
0FFFFF
Address
16
Always set to "1"
b3 b2
0 0 : Protect enable
0 1 : Protect enable
1 0 : Protect enable
1 1 : Protect enable
b5 b4
0 0 : No protect set bit
0 1 : Protect set bit active
1 0 : Protect set bit active
1 1 : Protect set bit active
b7 b6
0 0 : Protect enable
0 1 : Protect enable
1 0 : Protect enable
1 1 : Protect enable
Function
When reset
FF
16
Parallel I/O Mode
16
) during