ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 115

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

10.6.2
10.6.3
8077H–AVR–12/09
STATUS: Battery Backup Status Register
BACKUP0: Battery Backup Register 0
These bits are protected by the Configuration Change Protection mechanism, for detailed
description refer to
• Bit 7 - BBPWR: Battery Backup Power
The Power on the V
BBPWR flag will be set to one when no V
writing a one to its bit location.
• Bit [6:4] - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3- XOSCRDY: Crystal Oscillator Ready
When the 32 kHz crystal oscillator is stable and ready to be used, this flag is set. This flag can
be cleared by writing a one to its bit location.
• Bit 2 - XOSCFAIL: Crystal Oscillator Failure
If the 32 kHz crystal oscillator has had an failure, the flag will be read as one. This flag can be
cleared by applying a RESET to the battery backup module.
• Bit 1 - BBBODF: Battery Backup Brown-Out Detection Flag
This flag is read one if a Battery Backup BOD is detected when the Battery Backup Module is
powered from the V
is not valid when BBPWR is set.
• Bit 0 - BBPODF: Battery Backup Power-On Detection Flag
This flag is set if a Battery Backup Power-On is detected, i.e when power is connected to V
This flag can be cleared by writing a one to its bit location. This flag is not valid when BBPWR is
set.
Bit
+0x01
Read/Write
Reset Value
Bit
+0x02
Read/Write
Reset Value
BBPWR
R/W
R/W
7
x
7
0
”Configuration Change Protection” on page
BAT
BAT
R/W
pin is automatically checked each time the main domain is powered. The
pin. This flag can be cleared by writing a one to its bit location. This flag
6
6
-
R
0
x
5
-
R
0
R/W
5
x
4
-
R
0
R/W
BACKUP0[7:0]
4
x
XOSCRDY
BAT
R/W
3
x
pin power is detected. The flag can be cleared by
R/W
3
x
XOSCFAIL
R/W
2
x
R/W
2
x
12.
BBBODF
R/W
1
R/W
0
1
x
BBPODF
R/W
0
R/W
x
0
0
XMEGA A
BACKUP0
STATUS
115
BAT
.