ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 85

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

8077H–AVR–12/09
• Bit 6:2 - PSADIV[4:0]: Prescaler A Division Factor
These bits define the division ratio of the clock prescaler A according to
can be written run-time to change the clock frequency of the clk
clock, clk
Table 7-2.
• Bit 1:0 - PSBCDIV: Prescaler B and C Division Factor
These bits define the division ratio of the clock prescaler B and C according to
caler B will set the clock frequency for the clk
set the clock frequency for the clk
ure 7-5 on page 80
Table 7-3.
PSBCDIV[1:0]
PSADIV[4:0]
SYS .
00000
00001
00011
00101
00111
01001
01011
01101
01111
10001
10101
10111
11001
11011
11101
11111
00
01
10
11
Prescaler B and C division factor
Prescaler A division factor
fore more details.
Group Configuration
Group Configuration
PER
128
256
512
1_1
1_2
4_1
2_2
16
32
64
1
2
4
8
and clk
CPU
PER2
clocks relative to the clk
Description
No division
Divide by 2
Divide by 4
Divide by 8
Divide by 16
Divide by 32
Divide by 64
Divide by 128
Divide by 256
Divide by 512
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Prescaler B division
No division
No division
Divide by 4
Divide by 2
clock relative to the clk
PER4
clock relative to the System
PER2
Prescaler C division
No division
Divide by 2
No division
Divide by 2
Table
PER4
clock. Refer to
XMEGA A
. Prescaler C will
Table
7-2. These bits
7-3. Pres-
Fig-
85