ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 258

MCU AVR 256KB FLASH A3B 64-QFN

ATXMEGA256A3B-MH

Manufacturer Part Number
ATXMEGA256A3B-MH
Description
MCU AVR 256KB FLASH A3B 64-QFN
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheets

Specifications of ATXMEGA256A3B-MH

Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATXMEGA256x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
49
Number Of Timers
7
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATXMEGA256A3B-MU
ATXMEGA256A3B-MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA256A3B-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
22.3
22.3.1
22.3.2
22.3.3
8077H–AVR–12/09
Registers Description
TXPLCTRL - IRCOM Transmitter Pulse Length Control Register
RXPLCTRL - IRCOM Receiver Pulse Length Control Register
CTRL - IRCOM Control Register
• Bits 7:0 - TXPLCTRL[7:0] - Transmitter Pulse Length Control
The 8-bit value sets the pulse modulation scheme for the transmitter. Setting this register will
have no effect if IRCOM mode is not selected by a USART.
By leaving this register value to zero, 3/16 of baud rate period pulse modulation is used.
Setting this value from 1 to 254 will give a fixed pulse length coding. The 8-bit value sets the
number of system clock periods for the pulse. The start of the pulse will be synchronized with the
rising edge of the baud rate clock.
Setting the value to 255 (0xFF) will disable pulse coding, letting the RX and TX signals pass
through the IRCOM Module unaltered. This enables other features through the IRCOM Module,
such as half-duplex USART, Loop-back testing and USART RX input from an Event Channel.
Note:
• Bits 7:0 - RXPLCTRL[7:0] - Receiver Pulse Length Control
The 8-bit value sets the filter coefficient for the IRCOM transceiver. Setting this register will have
no effect if IRCOM mode is not selected by a USART.
By leaving this register value to zero, filtering is disabled. Setting this value between 1 and 255
will enable filtering, where x+1 equal samples is required for the pulse to be accepted.
Note:
• Bits 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
Bit
+0x01
Read/Write
Initial Value
Bit
+0x02
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
TXPCTRL must be configured before USART transmitter is enabled (TXEN).
RXPCTRL must be configured before USART receiver is enabled (RXEN).
R/W
R/W
7
0
7
0
7
R
0
-
R/W
R/W
6
0
6
0
6
R
0
-
R/W
R/W
5
0
5
0
R
5
0
-
R/W
R/W
4
0
TXPLCTRL[7:0]
4
0
RXPLCTRL[7:0]
R
4
0
-
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
EVSEL[3:0]
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
TXPLCTRL
RXPLCTRL
CTRL
258

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