ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 245

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

8077H–AVR–12/09
The following equations can be used to calculate the ratio of the incoming data rate and internal
receiver baud rate.
Table 1.
Table 1.
Table 21-3
tolerated. Normal Speed mode has higher toleration of baud rate variations.
Table 21-3.
Table 21-4.
D
S
S
S
R
R
#(Data + Parity Bit)
#(Data + Parity Bit)
F
M
slow
fast
R
Sum of character size and parity size (D = 5 to 10 bit).
Samples per bit. S = 16 for Normal Speed mode and S = 8 for Double Speed mode.
First sample number used for majority voting. S
Double Speed mode.
Middle sample number used for majority voting. S
for Double Speed mode.
Is the ratio of the slowest incoming data rate that can be accepted in relation to the
receiver baud rate.
Is the ratio of the fastest incoming data rate that can be accepted in relation to the
receiver baud rate.
10
slow
D
D
5
6
7
8
9
5
6
7
and
Recommended Maximum Receiver Baud Rate Error for Normal Speed Mode
(CLK2X = 0)
Recommended Maximum Receiver Baud Rate Error for Double Speed Mode
(CLK2X = 1)
=
Table 21-4 on page 245
------------------------------------------ -
S 1
–
(
D
+
+
D S ⋅
R
R
slow
slow
1
93.20
94.12
94.81
95.36
95.81
96.17
94.12
94.92
95.52
)S
+
(%)
(%)
S
F
R
R
106.67
105.79
105.11
104.58
104.14
103.78
105.66
104.92
104.35
fast
fast
list the maximum receiver baud rate error that can be
(%)
(%)
Max Total Error (%)
Max Total Error (%)
+6.67/-6.80
+5.79/-5.88
+5.11/-5.19
+4.58/-4.54
+4.14/-4.19
+3.78/-3.83
+5.66/-5.88
+4.92/-5.08
+4.35/-4.48
R
fast
F
= 8 for normal speed and S
M
=
= 9 for normal speed and S
-----------------------------------
(
D
(
+
D
1
+
)S
2
)S
+
S
Recommended Max
Recommended Max
Receiver Error (%)
Receiver Error (%)
M
XMEGA A
± 3.0
± 2.5
± 2.0
± 2.0
± 1.5
± 1.5
± 2.5
± 2.0
± 1.5
F
= 4 for
M
= 5
245