ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 257

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

22.2.1
8077H–AVR–12/09
Event System Filtering
For transmission, three pulse modulation schemes are available:
For reception, a minimum high-level pulse width for the pulse to be decoded as a logical 0 can
be selected. Shorter pulses will then be discarded and the bit will be decoded to logical 1 as if no
pulse where received.
One IRCOM will be available for use with any USART in the device. The module can only be
used in combination with one USART at a time, thus IRCOM mode must not be set for more
than one USART at a time. This must be ensured in the user software.
The Event System can be used as the receiver input. This enables IRCOM or USART input from
other I/O pins or sources than the corresponding RX pin. If Event System input is enabled, input
from the USART's RX pin is automatically disabled. The Event System has Digital Input Filter
(DIF) on the Event Channels, that can be used for filtering. Refer to
on page
• 3/16 of baud rate period.
• Fixed programmable pulse time based on the Peripheral Clock speed.
• Pulse modulation disabled.
65” for details on using the Event System.
Section 6. ”Event System”
XMEGA A
257