ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 364

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

30.6
30.6.1
30.6.2
8077H–AVR–12/09
Flash and EEPROM Page Buffers
Flash Page Buffer
EEPROM Page Buffer
This ensures that the given command is executed and the operation finished before a new can
start. The External programmer or application software must ensure that the NVM is not
addressed while busy with a programming operation.
Programming any part of the NVM will automatically block:
During Self-Programming interrupts must be disabled, or the Interrupt Vector table should be
moved to the Boot Loader Sections as described in
Interrupt Controller” on page
The Flash memory is updated in a page-by-page fashion. The EEPROM can be updated both in
a byte-by-byte and page-by-page fashion. Flash and EEPROM page programming is done by
first filling the associated page buffer, and then writing the entire page buffer to a selected page
in Flash or EEPROM. For both Flash and EEPROM, page erase and write each requires 4 ms.
The size of the page buffers depend on the Flash and EEPROM size in each device, and details
on page size and page number is described in each device data sheet.
The Flash page buffer is filled one word at a time, and it must be erased before it can be loaded.
If an already loaded location is written again, this will corrupt the content of that Flash page buf-
fer location.
Flash page buffer Locations that are not loaded will have the value 0xFFFF, and this value will
then be programmed into the flash page locations.
The Flash Page Buffer is automatically erased after:
The EEPROM page buffer is filled one byte at a time and it must be erased before it can be
loaded. If an already loaded location is written twice, this will corrupt the content of that
EEPROM page buffer location.
EEPROM page buffer locations that are loaded will get tagged by the NVM Controller. During a
page write or page erase, only target locations will be written or erased. Locations that are not
target, will not be written or erased, and the corresponding EEPROM location will remain
unchanged. This means that also before an EEPROM page erase, data must be loaded to the
selected page buffer location to tag them. If the data in the page buffer is not going to be written
afterword, the actual values in the buffer does matter.
• NVM Data registers
• All programming to other parts of the NVM.
• All loading/erasing of the Flash and EEPROM Page Buffers.
• All NVM read from external programmers.
• All NVM read from the Application Section.
• A system reset.
• Executing the Write Flash Page command.
• Executing the Erase and Write Flash Page command.
• Executing the Signature Row write command.
• Executing the Write Lock Bit command.
123.
”Interrupts and Programmable Multi-level
XMEGA A
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