ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 332

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

27.9.2
8077H–AVR–12/09
ACnMUXCTRL – Analog Comparator Control Register
• Bits 5:4 - INTLVL[1:0]: Analog Comparator Interrupt Level
These bits enable the Analog Comparator n Interrupt and select the interrupt level as described
in
enabled interrupt will trigger according to the INTMODE setting.
• Bit 3 - HSMODE: Analog Comparator High-Speed Mode Select
Setting this bit selects High-speed mode and clearing this bit to select Low-power mode.
• Bits 2:1 - HYSMODE[1:0]: Analog Comparator Hysteresis Mode Select
These bits select hysteresis according to
to device data sheet.
Table 27-2.
• Bit 0 - ENABLE: Analog Comparator Enable
Settings this bit enables the Analog Comparator n.
• Bits 7:6 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bits 5:3 - MUXPOS[2:0]: Analog Comparator Positive Input MUX Selection
These bits select which input to be connected to the positive input of Analog Comparator n,
according to
Table 27-3.
Bit
+0x02 / +0x03
Read/Write
Initial Value
Section 12. ”Interrupts and Programmable Multi-level Interrupt Controller” on page
HYSMODE[1:0]
MUXPOS[2:0]
000
001
010
011
100
00
01
10
11
Table
Analog Comparator n Hysteresis Settings
Analog Comparator n Positive Input MUX Selection
R
7
0
-
27-3.
Group Configuration
Group Configuration
6
R
0
-
LARGE
SMALL
PIN0
PIN1
PIN2
PIN3
PIN4
NO
-
R/W
5
0
MUXPOS[2:0]
Table
R/W
4
0
Description
Large hysteresis
No hysteresis
Small hysteresis
Reserved
27-2. For details on actual hysteresis levels refer
R/W
3
0
R/W
2
0
Description
MUXNEG[2:0]
Pin 0
Pin 1
Pin 2
Pin 3
Pin 4
R/W
1
0
XMEGA A
R/W
0
0
ACnMUXCTRL
123. The
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