ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 373

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

30.11.2.10
30.11.2.11
30.11.2.12
30.11.2.13
8077H–AVR–12/09
Erase & Write Application Section / Boot Loader Section Page
Application Section / Boot Loader Section CRC
Erase User Signature Row
Write User Signature Row
The Erase & Write Application Section Page and Erase & Write Boot Loader Section Page com-
mands are used to erase one flash page and then write the Flash Page Buffer into that flash
page in the Application Section or Boot Loader Section, in one atomic operation.
The BUSY flag in the NVM STATUS register will be set until the operation is finished. The
FBUSY flag is set as long the Flash is Busy, and the Application section cannot be accessed.
An invalid page address in the Z-pointer will abort the NVM command. The Erase & Write Appli-
cation Section command requires that the Z-pointer addresses the Application section, and the
Erase & Write Boot Section Page command requires that the Z-pointer addresses the Boot
Loader Section.
The Application Section CRC and Boot Loader Section CRC commands can be used to verify
the Application Section and Boot Loader Section content after self-programming.
The BUSY flag in the NVM STATUS register will be set, and the CPU is halted during the execu-
tion of the CRC command. The CRC checksum will be available in the NVM Data registers.
The Erase User Signature Row command is used to erase the User Signature Row.
The BUSY flag in the NVM STATUS register will be set, and the CPU will be halted until the
erase operation is finished. The User Signature Row is NRWW.
The Write Signature Row command is used to write the Flash Page Buffer into the User Signa-
ture Row.
The BUSY flag in the NVM STATUS register will be set until the operation is finished, and the
CPU will be halted during the write operation. The Flash Page Buffer will be cleared during the
command execution after the write operation, but the CPU is not halted during this stage.
1. Load the Z-pointer with the flash page to write. The page address must be written to
2. Load the NVM CMD register with the Erase & Write Application Section/Boot Loader
3. Execute the SPM instruction. This requires the timed CCP sequence during self-
1. Load the NVM CMD register with the Application Section/ Boot Load Section CRC
2. Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
1. Load the NVM CMD register with the Erase User Signature Row command.
2. Execute the SPM instruction. This requires the timed CCP sequence during self-
1. Set up the NVM CMD register to Write User Signature Row command.
2. Execute the SPM instruction. This requires the timed CCP sequence during self-
PCPAGE. Other bits in the Z-pointer will be ignored during this operation.
Section Page command.
programming.
command.
during self-programming.
programming.
programming.
XMEGA A
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