ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 300

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

25.10 ADC Input Model
8077H–AVR–12/09
Figure 25-18. ADC timing for free running mode
An analog voltage input must be able to charge the sample and hold (S/H) capacitor in the ADC
in order to achieve maximum accuracy. Seen externally the ADC input consists of a input chan-
nel (R
300
Figure 25-19. ADC input for single ended measurements
Figure 25-20. ADC input for differential measurements and differential measurements with gain
In order to achieve n bit accuracy, the source output resistance, R
ADC input resistance on a pin:
GAINSTAGE AMPLIFY
START CH0, wo/GAIN
START CH1, wo/GAIN
GAINSTAGE SAMPLE
START CH0, w/GAIN
START CH1, w/GAIN
CONV COMPLETE
Negative
and
Positive
Positive
ADC SAMPLE
input
input
input
channel
CLK
Figure 25-20 on page 300
ADC
) and the switch (R
1
0
2
switch
2
1
R
R
R
3
channel
channel
shows the ADC input channels.
channel
) resistance, and the S/H capacitor.
2
3
2
4
3
3
5
R
R
R
switch
switch
switch
0
6
2
1
7
source
2
, must be less than the
3
2
Figure 25-19 on page
8
C
C
C
Sample
3
Sample
Sample
XMEGA A
3
0
9
VCC/2
VCC/2
0
1
10
300