ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 431

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

34.6
8077H–AVR–12/09
8077C – 07/08
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
35.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
Added RTC section
Updated
Updated
Updated
- 16-bit Timer/Counter” on page 379
Updated RTC32
Inserted a new section
Updated
Updated
Updated
Updated
”RXPLCTRL - IRCOM Receiver Pulse Length Control Register” on page 257
paragraph note.
Updated Bit 2 - SDROW in
Updated EBI
Updated
Added more details on unsigned input in the ADC section
Added ADC result representation figures in section
Added ADC section
Updated ADC section
Updated DAC section
Added
Updated Event System
Updated
Updated
Updated
Updated
Updated
Updated
Updated
Inserted general
Inserted Interrupt vectors in manual and
Inserted
”Peripheral Module Address Map” on page
”Appendix A: EBI Timing Diagrams” on page
”CTRLE - Control Register E” on page
”Capture Channel” on page
”Frequency Capture” on page
”STATUS– TWI Slave Status Register” on page
”IRCOM Mode of Operation” on page
”CTRLB - USART Control Register B” on page 250
”TXPLCTRL - IRCOM Transmitter Pulse Length Control Register” on page 257
”Register Summary - EBI” on page 287
”32 MHz Run-time Calibrated Internal Oscillator” on page
”STATUS - PMIC Status Register” on page
”Register Description” on page
”Register Summary” on page
”DES Instruction” on page
”SDRAMCTRLC - SDRAM Control Register C” on page
”TIMCTRL – DAC Timing Control Register” on page
”CTRLA - Chip Select Control Register A” on page 283
”Overview” on page
”Register Summary” on page
”Interrupts and events” on page
”Compare function” on page
”Timing constraints” on page
”Calibration” on page
”RTC32 - 32-bit Real Time Counter” on page
”Features” on page
”SDRAMCTRLA - SDRAM Control Register A” on page
249.
by removing DTHM-bit register.
156.
196.
178.
157.
173.
”Interrupt Vector Summary” on page
57.
300.
374.
248.
167,
by inserting the page numbers in last column.
295.
383.
”Conversion Result” on page
317.
190.
”Register Summary” on page 174
119.
390.
223, (Bit 7- DIF and Bit 6 - APIF).
”Input sources” on page
(Bit 2).
309. Initial Value: 0110 0001.
272.
70.
196.
(Bit 1:0)
XMEGA A
by inserting a
383.
294.
289.
279.
and
and
”TC
431