ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 284

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

24.12 Register Description - EBI Chip Select
24.12.1
8077H–AVR–12/09
CTRLA - Chip Select Control Register A
Table 24-16. SDRAM Row Column Delay settings (Continued)
• Bit 7 - Reserved
This bit is reserved and will always be read as zero.
• Bit 6:2 - ASIZE[4:0]: Chip Select Address Size
These bits select the address size for the Chip Select. This is the size of the block above the
base address.
Table 24-17. Address space encoding
Bit
+0x00
Read/Write
Initial Value
ASIZE[5:0]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
ROWCOLDLY[2:0]
100
101
110
111
R/W
7
0
-
R/W
6
0
Group Configuration
4CLK
5CLK
6CLK
7CLK
Group Configuration
256B
512B
1K
2K
4K
8K
16K
32K
64K
128K
256K
512K
1M
2M
4M
R/W
5
0
ASIZE[4:0]
R/W
4
0
Description
4 CLK
5 CLK
6 CLK
7 CLK
Address Size
256 Bytes
512 Bytes
1K Bytes
2K Bytes
4K Bytes
8K Bytes
16K Bytes
32K Bytes
64K Bytes
128K Bytes
256K Bytes
512K Bytes
1M Bytes
2M Bytes
4M Bytes
R/W
3
0
PER2
PER2
PER2
PER2
cycles delay
cycles delay
cycles delay
cycles delay
R/W
2
0
Address Lines Compared
ADDR[23:8]
ADDR[23:9]
ADDR[23:10]
ADDR[23:11]
ADDR[23:12]
ADDR[23:13]
ADDR[23:14
ADDR[23:15]
ADDR[23:16]
ADDR[23:17]
ADDR[23:18]
ADDR[23:19]
ADDR[23:20]
ADDR[23:21]
ADDR[23:22]
R/W
1
0
MODE[1:0]
R/W
0
0
XMEGA A
CTRLA
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