ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 189

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

16.3
16.3.1
16.4
8077H–AVR–12/09
Address
+0x00
Register Description
Register Summary
CTRLA - Hi-Res Control Register A
Name
CTRLA
• Bit 7:2 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1:0 - HREN[1:0]: Hi-Resolution Enable
Enables Hi-Resolution mode for a Timer/Counter according to
Setting one or both HREN bits will enable Hi-Resolution waveform generation output for the
entire general purpose I/O port. This means that both Timer/Counters connected to the same
port must enable Hi-Res if both are used for generating PWM or FRQ output on pins.
Table 16-1.
Bit
+0x00
Read/Write
Initial Value
Bit 7
HREN[1:0]
Hi-Resolution Enable
00
01
10
11
Bit 6
R
7
–
0
R
6
–
0
Bit 5
Hi-Resolution Enabled
None
Timer/Counter 0
Timer/Counter 1
Both Timer/Counters
5
–
R
0
Bit 4
R
4
–
0
Bit 3
R
3
–
0
Bit 2
Table
R
2
–
0
16-1.
Bit 1
R/W
1
0
HREN[1:0]
HREN[1:0]
XMEGA A
R/W
Bit 0
0
0
CTRLA
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