ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 194

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

17.3.7
17.3.8
17.3.9
8077H–AVR–12/09
CNTL - Real Time Counter Register L
PERH - Real Time Counter Period Register High
PERL - Real Time Counter Period Register L
• Bits 7:0 - CNT[15:8]: Real Time Counter value High byte
These bits hold the 8 MSB of the 16-bit Real Time Counter value.
• Bits 7:0 - CNT[7:0]: Real Time Counter value Low byte
These bits hold the 8 LSB of the 16-bit Real Time Counter value.
The PERH and PERL register pair represents the 16-bit value PER. PER is constantly com-
pared with the counter value (CNT). A match will set the OVFIF in the INTFLAGS register and
clear CNT. Reading and writing 16-bit values require special attention, refer to
bits Registers” on page 12
Due to synchronization between RTC clock and the system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application software
needs to check that the SYNCBUSY flag in the
on page 192
• Bits 7:0 - PER[15:8]: Real Time Counter Period High byte
These bits hold the 8 MSB of the 16-bit RTC top value.
• Bits 7:0 - PER[7:0]: Real Time Counter Period Low byte
These bits hold the 8 LSB of the 16-bit RTC top value.
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
is cleared before writing to this register.
R/W
R/W
R/W
7
1
7
0
7
1
R/W
R/W
R/W
6
1
6
0
6
1
for details.
R/W
R/W
R/W
5
0
5
1
5
1
R/W
R/W
R/W
4
0
4
1
4
1
PER[15:8]
CNT[7:0]
PER[7:0]
”STATUS - Real Time Counter Status Register”
R/W
R/W
R/W
3
0
3
1
3
1
R/W
R/W
R/W
2
0
2
1
2
1
R/W
R/W
R/W
1
0
1
1
1
1
XMEGA A
R/W
R/W
R/W
”Accessing 16-
0
0
0
1
0
1
CNTL
PERH
PERL
194