ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 99

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

8.6.2
8.6.3
8077H–AVR–12/09
PRPA/B - Power Reduction Port A/B Register
PRPC/D/E/F - Power Reduction Port C/D/E/F Register
Note:
• Bit 7:3 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 2 - DAC: Power Reduction DAC
Setting this bit stops the clock to the DAC. The DAC should be disabled before shut down.
• Bit 1 - ADC: Power Reduction ADC
Setting this bit stops the clock to the ADC. The ADC should be disabled before shut down.
• Bit 0 - AC: Power Reduction Analog Comparator
Setting this bit stops the clock to the Analog Comparator. The AC should be disabled before shut
down.
• Bit 7 - Reserved
This bit is reserved and will always be read as zero. For compatibility with future devices, always
write this bit to zero when this register is written.
• Bit 6 - TWI: Two-Wire Interface
Setting this bit stops the clock to the Two-Wire Interface. When the bit is cleared the peripheral
should be reinitialized to ensure proper operation.
• Bit 5 - USART1
Setting this bit stops the clock to the USART1. When the bit is cleared the peripheral should be
reinitialized to ensure proper operation.
• Bit 4 - USART0
Setting this bit stops the clock to the USART0. When the bit is cleared the peripheral should be
reinitialized to ensure proper operation.
Bit
+0x01/+0x02
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Disabling of analog modules stops the clock to the analog blocks themselves and not only the
interfaces.
R
7
0
-
R
7
0
-
TWI
R/W
6
0
R
6
0
-
USART1
R/W
5
0
R
5
0
-
USART0
R/W
4
0
R
4
0
-
R/W
SPI
3
0
3
R
0
-
HIRES
R/W
DAC
R/W
2
0
2
0
TC1
R/W
ADC
R/W
1
0
1
0
XMEGA A
TC0
R/W
R/W
0
0
AC
0
0
PRPC/D/E/F
PRPA/B
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