ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 181

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

15.6
15.6.1
15.6.2
15.6.3
8077H–AVR–12/09
Fault Protection
Fault Actions
Fault Restore Modes
Change Protection
The Fault Protection feature enables fast and deterministic action when a fault is detected. The
fault protection is event controlled, thus any event from the Event System can be used to trigger
a fault action.
When the Fault Protection is enabled an incoming event from any of the selected event channel
can trigger the event action. Each event channel can be separately enabled as fault protection
input, and the specified event channels will be ORed together allowing multiple event sources
top be used for fault protection at the same time.
Two different even actions can be selected:
When a fault is detected the Fault Detection Flag is set, and the Timer/Counter’s Error Interrupt
Flag is set and the optional interrupt is generated.
From the event occurs in one peripherals until the Fault Protection triggers the event action,
there is maximum two peripheral clock cycles. The Fault Protection is fully independent of the
CPU and DMA, but it requires the Peripheral Clock to run.
After a fault, that is when the fault condition is no longer active, it is selectable how the AWeX
and Timer/Counter can return from fault state and restore with normal operation. Two different
modes are available:
When entering fault state and the Clear Override Enable action is selected, the OUTOVEN[7:0]
bits are reassigned a value on the next UPDATE condition. In pattern generation mode the reg-
ister is restored with the value in the DTLSBUF register. Otherwise the register bits are restored
according to the enabled DTI channels.
When entering fault state and Direction Clear action is select is set, corresponding DIR[7:0] bits
is restored with the value in the DTLSBUF register in pattern generation mode and for the pin
pairs corresponding to enabled DTI channels otherwise.
The UPDATE condition used to restore the normal operation is the same update as in the
Timer/Counter.
To avoid unintentional changes in the fault protection setup all the control registers in the AWeX
Extension can be protected by writing the corresponding lock bit Advanced Waveform Extension
• The Clear Override Enable action will clear the Output Override Enable register (OUTOVEN)
• The Direction Clear action will clear the Direction (DIR) register in the associated port, setting
• In Latched Mode the waveform output will remain in the fault state until the fault condition is
• In Cycle-by-Cycle Mode the waveform output will remain in the fault state until the fault
and disable the output override on all Timer/Counter outputs. The result is that the in the
output will be as set by the port pin configuration.
all port pins as tri-stated inputs.
no longer active and the fault detect flag has been cleared by software. When both of these
conditions are met, the waveform output will return to normal operation at the next UPDATE
condition.
condition is no longer active. When this condition is met, the waveform output will return to
normal operation at the next UPDATE condition.
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